forked from OSchip/llvm-project
187 lines
5.9 KiB
YAML
187 lines
5.9 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=aarch64-apple-darwin -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s
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...
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---
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name: select_f32
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alignment: 4
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legalized: true
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $s0, $s1, $w0
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; CHECK-LABEL: name: select_f32
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; CHECK: liveins: $s0, $s1, $w0
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; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0
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; CHECK: [[TRUNC:%[0-9]+]]:gpr(s1) = G_TRUNC [[COPY]](s32)
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; CHECK: [[COPY1:%[0-9]+]]:fpr(s32) = COPY $s0
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; CHECK: [[COPY2:%[0-9]+]]:fpr(s32) = COPY $s1
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; CHECK: [[SELECT:%[0-9]+]]:fpr(s32) = G_SELECT [[TRUNC]](s1), [[COPY1]], [[COPY2]]
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; CHECK: $s0 = COPY [[SELECT]](s32)
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; CHECK: RET_ReallyLR implicit $s0
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%3:_(s32) = COPY $w0
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%0:_(s1) = G_TRUNC %3(s32)
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%1:_(s32) = COPY $s0
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%2:_(s32) = COPY $s1
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%4:_(s32) = G_SELECT %0(s1), %1, %2
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$s0 = COPY %4(s32)
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RET_ReallyLR implicit $s0
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...
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---
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name: select_f64
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alignment: 4
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legalized: true
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $d0, $d1, $w0
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; CHECK-LABEL: name: select_f64
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; CHECK: liveins: $d0, $d1, $w0
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; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0
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; CHECK: [[TRUNC:%[0-9]+]]:gpr(s1) = G_TRUNC [[COPY]](s32)
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; CHECK: [[COPY1:%[0-9]+]]:fpr(s64) = COPY $d0
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; CHECK: [[COPY2:%[0-9]+]]:fpr(s64) = COPY $d1
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; CHECK: [[SELECT:%[0-9]+]]:fpr(s64) = G_SELECT [[TRUNC]](s1), [[COPY1]], [[COPY2]]
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; CHECK: $d0 = COPY [[SELECT]](s64)
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; CHECK: RET_ReallyLR implicit $d0
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%3:_(s32) = COPY $w0
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%0:_(s1) = G_TRUNC %3(s32)
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%1:_(s64) = COPY $d0
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%2:_(s64) = COPY $d1
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%4:_(s64) = G_SELECT %0(s1), %1, %2
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$d0 = COPY %4(s64)
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RET_ReallyLR implicit $d0
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...
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---
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name: two_fpr_inputs_gpr_output
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alignment: 4
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legalized: true
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $d0, $d1, $w0
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; CHECK-LABEL: name: two_fpr_inputs_gpr_output
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; CHECK: liveins: $d0, $d1, $w0
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; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0
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; CHECK: [[TRUNC:%[0-9]+]]:gpr(s1) = G_TRUNC [[COPY]](s32)
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; CHECK: [[COPY1:%[0-9]+]]:fpr(s64) = COPY $d0
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; CHECK: [[COPY2:%[0-9]+]]:fpr(s64) = COPY $d1
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; CHECK: [[SELECT:%[0-9]+]]:fpr(s64) = G_SELECT [[TRUNC]](s1), [[COPY1]], [[COPY2]]
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; CHECK: $x0 = COPY [[SELECT]](s64)
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; CHECK: RET_ReallyLR implicit $x0
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; Verify that the G_SELECT only has FPRs.
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; The only difference between fcsel and csel are the register banks. So,
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; if we have two FPR inputs and a GPR output, we should do a floating point
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; select anyway. This will cost one copy for the output, but that's less
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; than doing two to put the inputs on GPRs.
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%3:_(s32) = COPY $w0
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%0:_(s1) = G_TRUNC %3(s32)
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%1:_(s64) = COPY $d0
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%2:_(s64) = COPY $d1
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%4:_(s64) = G_SELECT %0(s1), %1, %2
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$x0 = COPY %4(s64)
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RET_ReallyLR implicit $x0
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...
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---
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name: one_fpr_input_fpr_output
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alignment: 4
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legalized: true
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $d0, $x1, $w0
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; CHECK-LABEL: name: one_fpr_input_fpr_output
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; CHECK: liveins: $d0, $x1, $w0
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; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0
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; CHECK: [[TRUNC:%[0-9]+]]:gpr(s1) = G_TRUNC [[COPY]](s32)
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; CHECK: [[COPY1:%[0-9]+]]:fpr(s64) = COPY $d0
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; CHECK: [[COPY2:%[0-9]+]]:gpr(s64) = COPY $x1
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; CHECK: [[COPY3:%[0-9]+]]:fpr(s64) = COPY [[COPY2]](s64)
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; CHECK: [[SELECT:%[0-9]+]]:fpr(s64) = G_SELECT [[TRUNC]](s1), [[COPY1]], [[COPY3]]
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; CHECK: $d0 = COPY [[SELECT]](s64)
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; CHECK: RET_ReallyLR implicit $d0
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; Same idea as the above test. If the output is an FPR, and one of the
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; inputs is an FPR, then it's fewer copies to just do a FCSEL.
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%3:_(s32) = COPY $w0
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%0:_(s1) = G_TRUNC %3(s32)
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%1:_(s64) = COPY $d0
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%2:_(s64) = COPY $x1
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%4:_(s64) = G_SELECT %0(s1), %1, %2
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$d0 = COPY %4(s64)
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RET_ReallyLR implicit $d0
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...
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---
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name: one_fpr_input_gpr_output
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alignment: 4
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legalized: true
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $d0, $x1, $w0
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; CHECK-LABEL: name: one_fpr_input_gpr_output
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; CHECK: liveins: $d0, $x1, $w0
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; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0
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; CHECK: [[TRUNC:%[0-9]+]]:gpr(s1) = G_TRUNC [[COPY]](s32)
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; CHECK: [[COPY1:%[0-9]+]]:fpr(s64) = COPY $d0
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; CHECK: [[COPY2:%[0-9]+]]:gpr(s64) = COPY $x1
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; CHECK: [[COPY3:%[0-9]+]]:gpr(s64) = COPY [[COPY1]](s64)
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; CHECK: [[SELECT:%[0-9]+]]:gpr(s64) = G_SELECT [[TRUNC]](s1), [[COPY3]], [[COPY2]]
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; CHECK: $x0 = COPY [[SELECT]](s64)
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; CHECK: RET_ReallyLR implicit $x0
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; Now we have more GPR registers on the G_SELECT. It's cheaper here to put
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; everything on GPR.
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%3:_(s32) = COPY $w0
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%0:_(s1) = G_TRUNC %3(s32)
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%1:_(s64) = COPY $d0
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%2:_(s64) = COPY $x1
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%4:_(s64) = G_SELECT %0(s1), %1, %2
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$x0 = COPY %4(s64)
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RET_ReallyLR implicit $x0
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...
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---
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name: two_gpr_input_fpr_output
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alignment: 4
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legalized: true
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $x0, $x1, $w0
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; CHECK-LABEL: name: two_gpr_input_fpr_output
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; CHECK: liveins: $x0, $x1, $w0
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; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0
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; CHECK: [[TRUNC:%[0-9]+]]:gpr(s1) = G_TRUNC [[COPY]](s32)
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; CHECK: [[COPY1:%[0-9]+]]:gpr(s64) = COPY $x0
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; CHECK: [[COPY2:%[0-9]+]]:gpr(s64) = COPY $x1
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; CHECK: [[SELECT:%[0-9]+]]:gpr(s64) = G_SELECT [[TRUNC]](s1), [[COPY1]], [[COPY2]]
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; CHECK: $d0 = COPY [[SELECT]](s64)
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; CHECK: RET_ReallyLR implicit $d0
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; Same as above. The G_SELECT should get all GPRS.
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%3:_(s32) = COPY $w0
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%0:_(s1) = G_TRUNC %3(s32)
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%1:_(s64) = COPY $x0
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%2:_(s64) = COPY $x1
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%4:_(s64) = G_SELECT %0(s1), %1, %2
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$d0 = COPY %4(s64)
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RET_ReallyLR implicit $d0
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