llvm-project/llvm/test/CodeGen/AArch64/GlobalISel/postlegalizercombiner-extra...

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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple aarch64 -run-pass=aarch64-postlegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s
---
name: f64_faddp
alignment: 4
legalized: true
tracksRegLiveness: true
liveins:
- { reg: '$q0' }
body: |
bb.1:
liveins: $q0
; CHECK-LABEL: name: f64_faddp
; CHECK: liveins: $q0
; CHECK: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
; CHECK: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[COPY]](<2 x s64>), [[C]](s64)
; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK: [[EVEC1:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[COPY]](<2 x s64>), [[C1]](s64)
; CHECK: [[FADD:%[0-9]+]]:_(s64) = G_FADD [[EVEC]], [[EVEC1]]
; CHECK: $d0 = COPY [[FADD]](s64)
; CHECK: RET_ReallyLR implicit $d0
%0:_(<2 x s64>) = COPY $q0
%2:_(<2 x s64>) = G_IMPLICIT_DEF
%5:_(s64) = G_CONSTANT i64 0
%1:_(<2 x s64>) = G_SHUFFLE_VECTOR %0(<2 x s64>), %2, shufflemask(1, undef)
%3:_(<2 x s64>) = G_FADD %1, %0
%4:_(s64) = G_EXTRACT_VECTOR_ELT %3(<2 x s64>), %5(s64)
$d0 = COPY %4(s64)
RET_ReallyLR implicit $d0
...
---
name: f64_faddp_commuted
alignment: 4
legalized: true
tracksRegLiveness: true
liveins:
- { reg: '$q0' }
body: |
bb.1:
liveins: $q0
; CHECK-LABEL: name: f64_faddp_commuted
; CHECK: liveins: $q0
; CHECK: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
; CHECK: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[COPY]](<2 x s64>), [[C]](s64)
; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK: [[EVEC1:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[COPY]](<2 x s64>), [[C1]](s64)
; CHECK: [[FADD:%[0-9]+]]:_(s64) = G_FADD [[EVEC]], [[EVEC1]]
; CHECK: $d0 = COPY [[FADD]](s64)
; CHECK: RET_ReallyLR implicit $d0
%0:_(<2 x s64>) = COPY $q0
%2:_(<2 x s64>) = G_IMPLICIT_DEF
%5:_(s64) = G_CONSTANT i64 0
%1:_(<2 x s64>) = G_SHUFFLE_VECTOR %0(<2 x s64>), %2, shufflemask(1, undef)
%3:_(<2 x s64>) = G_FADD %0, %1
%4:_(s64) = G_EXTRACT_VECTOR_ELT %3(<2 x s64>), %5(s64)
$d0 = COPY %4(s64)
RET_ReallyLR implicit $d0
...
---
name: f32_faddp
alignment: 4
legalized: true
tracksRegLiveness: true
liveins:
- { reg: '$d0' }
body: |
bb.1:
liveins: $d0
; CHECK-LABEL: name: f32_faddp
; CHECK: liveins: $d0
; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
; CHECK: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[COPY]](<2 x s32>), [[C]](s64)
; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK: [[EVEC1:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[COPY]](<2 x s32>), [[C1]](s64)
; CHECK: [[FADD:%[0-9]+]]:_(s32) = G_FADD [[EVEC]], [[EVEC1]]
; CHECK: $s0 = COPY [[FADD]](s32)
; CHECK: RET_ReallyLR implicit $s0
%0:_(<2 x s32>) = COPY $d0
%2:_(<2 x s32>) = G_IMPLICIT_DEF
%5:_(s64) = G_CONSTANT i64 0
%1:_(<2 x s32>) = G_SHUFFLE_VECTOR %0(<2 x s32>), %2, shufflemask(1, undef)
%3:_(<2 x s32>) = G_FADD %1, %0
%4:_(s32) = G_EXTRACT_VECTOR_ELT %3(<2 x s32>), %5(s64)
$s0 = COPY %4(s32)
RET_ReallyLR implicit $s0
...
---
name: f32_faddp_commuted
alignment: 4
legalized: true
tracksRegLiveness: true
liveins:
- { reg: '$d0' }
body: |
bb.1:
liveins: $d0
; CHECK-LABEL: name: f32_faddp_commuted
; CHECK: liveins: $d0
; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
; CHECK: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[COPY]](<2 x s32>), [[C]](s64)
; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK: [[EVEC1:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[COPY]](<2 x s32>), [[C1]](s64)
; CHECK: [[FADD:%[0-9]+]]:_(s32) = G_FADD [[EVEC]], [[EVEC1]]
; CHECK: $s0 = COPY [[FADD]](s32)
; CHECK: RET_ReallyLR implicit $s0
%0:_(<2 x s32>) = COPY $d0
%2:_(<2 x s32>) = G_IMPLICIT_DEF
%5:_(s64) = G_CONSTANT i64 0
%1:_(<2 x s32>) = G_SHUFFLE_VECTOR %0(<2 x s32>), %2, shufflemask(1, undef)
%3:_(<2 x s32>) = G_FADD %0, %1
%4:_(s32) = G_EXTRACT_VECTOR_ELT %3(<2 x s32>), %5(s64)
$s0 = COPY %4(s32)
RET_ReallyLR implicit $s0
...
---
name: wrong_extract_idx
alignment: 4
legalized: true
tracksRegLiveness: true
liveins:
- { reg: '$q0' }
body: |
bb.1:
liveins: $q0
; CHECK-LABEL: name: wrong_extract_idx
; CHECK: liveins: $q0
; CHECK: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0
; CHECK: [[DEF:%[0-9]+]]:_(<2 x s64>) = G_IMPLICIT_DEF
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK: [[SHUF:%[0-9]+]]:_(<2 x s64>) = G_SHUFFLE_VECTOR [[COPY]](<2 x s64>), [[DEF]], shufflemask(1, undef)
; CHECK: [[FADD:%[0-9]+]]:_(<2 x s64>) = G_FADD [[SHUF]], [[COPY]]
; CHECK: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[FADD]](<2 x s64>), [[C]](s64)
; CHECK: $d0 = COPY [[EVEC]](s64)
; CHECK: RET_ReallyLR implicit $d0
%0:_(<2 x s64>) = COPY $q0
%2:_(<2 x s64>) = G_IMPLICIT_DEF
%5:_(s64) = G_CONSTANT i64 1
%1:_(<2 x s64>) = G_SHUFFLE_VECTOR %0(<2 x s64>), %2, shufflemask(1, undef)
%3:_(<2 x s64>) = G_FADD %1, %0
%4:_(s64) = G_EXTRACT_VECTOR_ELT %3(<2 x s64>), %5(s64)
$d0 = COPY %4(s64)
RET_ReallyLR implicit $d0
...
---
name: wrong_shuffle_mask
alignment: 4
legalized: true
tracksRegLiveness: true
liveins:
- { reg: '$q0' }
body: |
bb.1:
liveins: $q0
; CHECK-LABEL: name: wrong_shuffle_mask
; CHECK: liveins: $q0
; CHECK: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0
; CHECK: [[DEF:%[0-9]+]]:_(<2 x s64>) = G_IMPLICIT_DEF
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
; CHECK: [[SHUF:%[0-9]+]]:_(<2 x s64>) = G_SHUFFLE_VECTOR [[COPY]](<2 x s64>), [[DEF]], shufflemask(0, undef)
; CHECK: [[FADD:%[0-9]+]]:_(<2 x s64>) = G_FADD [[SHUF]], [[COPY]]
; CHECK: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[FADD]](<2 x s64>), [[C]](s64)
; CHECK: $d0 = COPY [[EVEC]](s64)
; CHECK: RET_ReallyLR implicit $d0
%0:_(<2 x s64>) = COPY $q0
%2:_(<2 x s64>) = G_IMPLICIT_DEF
%5:_(s64) = G_CONSTANT i64 0
%1:_(<2 x s64>) = G_SHUFFLE_VECTOR %0(<2 x s64>), %2, shufflemask(0, undef)
%3:_(<2 x s64>) = G_FADD %1, %0
%4:_(s64) = G_EXTRACT_VECTOR_ELT %3(<2 x s64>), %5(s64)
$d0 = COPY %4(s64)
RET_ReallyLR implicit $d0
...