llvm-project/llvm/test/CodeGen/AArch64/GlobalISel/legalize-sext-128.mir

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# RUN: llc -o - --global-isel=1 -verify-machineinstrs -run-pass=legalizer -x mir %s
--- |
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-unknown-linux-gnu"
define i1 @foo(i64) {
%a = sext i64 %0 to i128
%b = icmp sle i128 %a, 0
ret i1 %b
}
...
---
name: foo
body: |
bb.1 (%ir-block.1):
liveins: $x0
%namedVReg4352:_(s64) = COPY $x0
%namedVReg1356:_(s128) = G_CONSTANT i128 0
%namedVReg1355:_(s128) = G_SEXT %namedVReg4352(s64)
%namedVReg1354:_(s1) = G_ICMP intpred(sle), %namedVReg1355(s128), %namedVReg1356
%namedVReg1353:_(s32) = G_SEXT %namedVReg1354(s1)
$w0 = COPY %namedVReg1353(s32)
RET_ReallyLR implicit $w0
...