forked from OSchip/llvm-project
163 lines
5.4 KiB
YAML
163 lines
5.4 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=arm64-unknown-unknown -global-isel -global-isel-abort=1 -O0 -run-pass=legalizer %s -o - | FileCheck %s
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--- |
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64"
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define i8* @test_simple_alloca(i32 %numelts) {
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%addr = alloca i8, i32 %numelts
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ret i8* %addr
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}
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define i8* @test_aligned_alloca(i32 %numelts) {
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%addr = alloca i8, i32 %numelts, align 32
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ret i8* %addr
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}
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define i128* @test_natural_alloca(i32 %numelts) {
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%addr = alloca i128, i32 %numelts
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ret i128* %addr
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}
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...
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---
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name: test_simple_alloca
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alignment: 4
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tracksRegLiveness: true
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liveins:
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- { reg: '$w0' }
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frameInfo:
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maxAlignment: 1
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stack:
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- { id: 0, name: addr, type: variable-sized, alignment: 1 }
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machineFunctionInfo: {}
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body: |
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bb.1 (%ir-block.0):
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liveins: $w0
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; CHECK-LABEL: name: test_simple_alloca
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; CHECK: liveins: $w0
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
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; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
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; CHECK: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[COPY]](s32)
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; CHECK: [[MUL:%[0-9]+]]:_(s64) = G_MUL [[ZEXT]], [[C]]
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; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 15
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; CHECK: [[ADD:%[0-9]+]]:_(s64) = nuw G_ADD [[MUL]], [[C1]]
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; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 -16
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; CHECK: [[AND:%[0-9]+]]:_(s64) = G_AND [[ADD]], [[C2]]
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; CHECK: [[COPY1:%[0-9]+]]:_(p0) = COPY $sp
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; CHECK: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p0)
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; CHECK: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[PTRTOINT]], [[AND]]
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; CHECK: [[INTTOPTR:%[0-9]+]]:_(p0) = G_INTTOPTR [[SUB]](s64)
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; CHECK: $sp = COPY [[INTTOPTR]](p0)
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; CHECK: [[COPY2:%[0-9]+]]:_(p0) = COPY [[INTTOPTR]](p0)
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; CHECK: $x0 = COPY [[COPY2]](p0)
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; CHECK: RET_ReallyLR implicit $x0
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%0:_(s32) = COPY $w0
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%3:_(s64) = G_CONSTANT i64 1
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%1:_(s64) = G_ZEXT %0(s32)
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%2:_(s64) = G_MUL %1, %3
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%4:_(s64) = G_CONSTANT i64 15
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%5:_(s64) = nuw G_ADD %2, %4
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%6:_(s64) = G_CONSTANT i64 -16
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%7:_(s64) = G_AND %5, %6
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%8:_(p0) = G_DYN_STACKALLOC %7(s64), 0
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$x0 = COPY %8(p0)
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RET_ReallyLR implicit $x0
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...
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---
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name: test_aligned_alloca
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alignment: 4
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tracksRegLiveness: true
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liveins:
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- { reg: '$w0' }
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frameInfo:
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maxAlignment: 32
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stack:
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- { id: 0, name: addr, type: variable-sized, alignment: 32 }
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machineFunctionInfo: {}
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body: |
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bb.1 (%ir-block.0):
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liveins: $w0
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; CHECK-LABEL: name: test_aligned_alloca
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; CHECK: liveins: $w0
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
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; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
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; CHECK: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[COPY]](s32)
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; CHECK: [[MUL:%[0-9]+]]:_(s64) = G_MUL [[ZEXT]], [[C]]
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; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 15
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; CHECK: [[ADD:%[0-9]+]]:_(s64) = nuw G_ADD [[MUL]], [[C1]]
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; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 -16
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; CHECK: [[AND:%[0-9]+]]:_(s64) = G_AND [[ADD]], [[C2]]
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; CHECK: [[COPY1:%[0-9]+]]:_(p0) = COPY $sp
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; CHECK: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p0)
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; CHECK: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[PTRTOINT]], [[AND]]
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; CHECK: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 -32
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; CHECK: [[AND1:%[0-9]+]]:_(s64) = G_AND [[SUB]], [[C3]]
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; CHECK: [[INTTOPTR:%[0-9]+]]:_(p0) = G_INTTOPTR [[AND1]](s64)
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; CHECK: $sp = COPY [[INTTOPTR]](p0)
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; CHECK: [[COPY2:%[0-9]+]]:_(p0) = COPY [[INTTOPTR]](p0)
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; CHECK: $x0 = COPY [[COPY2]](p0)
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; CHECK: RET_ReallyLR implicit $x0
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%0:_(s32) = COPY $w0
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%3:_(s64) = G_CONSTANT i64 1
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%1:_(s64) = G_ZEXT %0(s32)
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%2:_(s64) = G_MUL %1, %3
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%4:_(s64) = G_CONSTANT i64 15
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%5:_(s64) = nuw G_ADD %2, %4
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%6:_(s64) = G_CONSTANT i64 -16
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%7:_(s64) = G_AND %5, %6
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%8:_(p0) = G_DYN_STACKALLOC %7(s64), 32
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$x0 = COPY %8(p0)
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RET_ReallyLR implicit $x0
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...
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---
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name: test_natural_alloca
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alignment: 4
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tracksRegLiveness: true
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liveins:
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- { reg: '$w0' }
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frameInfo:
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maxAlignment: 1
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stack:
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- { id: 0, name: addr, type: variable-sized, alignment: 1 }
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machineFunctionInfo: {}
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body: |
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bb.1 (%ir-block.0):
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liveins: $w0
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; CHECK-LABEL: name: test_natural_alloca
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; CHECK: liveins: $w0
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
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; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
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; CHECK: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[COPY]](s32)
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; CHECK: [[MUL:%[0-9]+]]:_(s64) = G_MUL [[ZEXT]], [[C]]
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; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 15
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; CHECK: [[ADD:%[0-9]+]]:_(s64) = nuw G_ADD [[MUL]], [[C1]]
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; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 -16
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; CHECK: [[AND:%[0-9]+]]:_(s64) = G_AND [[ADD]], [[C2]]
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; CHECK: [[COPY1:%[0-9]+]]:_(p0) = COPY $sp
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; CHECK: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p0)
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; CHECK: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[PTRTOINT]], [[AND]]
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; CHECK: [[INTTOPTR:%[0-9]+]]:_(p0) = G_INTTOPTR [[SUB]](s64)
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; CHECK: $sp = COPY [[INTTOPTR]](p0)
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; CHECK: [[COPY2:%[0-9]+]]:_(p0) = COPY [[INTTOPTR]](p0)
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; CHECK: $x0 = COPY [[COPY2]](p0)
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; CHECK: RET_ReallyLR implicit $x0
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%0:_(s32) = COPY $w0
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%3:_(s64) = G_CONSTANT i64 16
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%1:_(s64) = G_ZEXT %0(s32)
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%2:_(s64) = G_MUL %1, %3
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%4:_(s64) = G_CONSTANT i64 15
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%5:_(s64) = nuw G_ADD %2, %4
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%6:_(s64) = G_CONSTANT i64 -16
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%7:_(s64) = G_AND %5, %6
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%8:_(p0) = G_DYN_STACKALLOC %7(s64), 0
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$x0 = COPY %8(p0)
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RET_ReallyLR implicit $x0
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...
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