forked from OSchip/llvm-project
77 lines
2.6 KiB
LLVM
77 lines
2.6 KiB
LLVM
; Test that LICM correctly detects conflicting accesses to memory in deeply
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; nested subloops. This works in the legacy PM due to a special retained map of
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; alias information for inner loops, and in the new PM it is recomputed for each
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; loop.
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;
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; RUN: opt -S -aa-pipeline=basic-aa -passes='require<opt-remark-emit>,loop(licm)' < %s | FileCheck %s
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; RUN: opt -S -basicaa -licm < %s | FileCheck %s
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define i32 @test(i32* %a, i64 %n.0, i64 %n.0.0, i64 %n.0.0.0, i64 %n.0.0.0.0) nounwind uwtable readonly {
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; CHECK-LABEL: define i32 @test
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entry:
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%b = alloca i32
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%c = alloca i32
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%a.i8 = bitcast i32* %a to i8*
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%b.i8 = bitcast i32* %b to i8*
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%c.i8 = bitcast i32* %c to i8*
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br label %l.0.header
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; CHECK: %b = alloca i32
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; CHECK: %c = alloca i32
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; CHECK: %[[AI8:.*]] = bitcast i32* %a to i8*
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; CHECK: %[[BI8:.*]] = bitcast i32* %b to i8*
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; CHECK: %[[CI8:.*]] = bitcast i32* %c to i8*
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; CHECK-NOT: load
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; CHECK: br
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l.0.header:
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%iv.0 = phi i64 [ %iv.0.next, %l.0.latch ], [ 0, %entry ]
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%iv.0.next = add i64 %iv.0, 1
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%exitcond.0 = icmp eq i64 %iv.0.next, %n.0
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%a.val = load i32, i32* %a
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store i32 %a.val, i32* %b
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%c.val = trunc i64 %iv.0 to i32
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store i32 %c.val, i32* %c
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br label %l.0.0.header
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; CHECK: %[[AV:.*]] = load i32, i32* %a
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; CHECK: store i32 %[[AV]], i32* %b
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; CHECK: %[[CT:.*]] = trunc i64 {{.*}} to i32
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; CHECK: store i32 %[[CT]], i32* %c
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; CHECK: br
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l.0.0.header:
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%iv.0.0 = phi i64 [ %iv.0.0.next, %l.0.0.latch ], [ 0, %l.0.header ]
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%iv.0.0.next = add i64 %iv.0.0, 1
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%exitcond.0.0 = icmp eq i64 %iv.0.0.next, %n.0.0
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br label %l.0.0.0.header
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; CHECK: br
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l.0.0.0.header:
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%iv.0.0.0 = phi i64 [ %iv.0.0.0.next, %l.0.0.0.header ], [ 0, %l.0.0.header ]
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%iv.0.0.0.next = add i64 %iv.0.0.0, 1
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%exitcond.0.0.0 = icmp eq i64 %iv.0.0.0.next, %n.0.0.0
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call void @llvm.memcpy.p0i8.p0i8.i64(i8* %a.i8, i8* %c.i8, i64 4, i1 false)
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call void @llvm.memcpy.p0i8.p0i8.i64(i8* %b.i8, i8* %c.i8, i64 4, i1 false)
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br i1 %exitcond.0.0.0, label %l.0.0.0.header, label %l.0.0.latch
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; CHECK: call void @llvm.memcpy.{{.*}}(i8* %[[AI8]], i8* %[[CI8]], i64 4
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; CHECK: call void @llvm.memcpy.{{.*}}(i8* %[[BI8]], i8* %[[CI8]], i64 4
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; CHECK: br
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l.0.0.latch:
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br i1 %exitcond.0.0, label %l.0.0.header, label %l.0.latch
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; CHECK: br
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l.0.latch:
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%b.val = load i32, i32* %b
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br i1 %exitcond.0, label %exit, label %l.0.header
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; CHECK: %[[BV:.*]] = load i32, i32* %b
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; CHECK: br
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exit:
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%result.lcssa = phi i32 [ %b.val, %l.0.latch ]
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ret i32 %b.val
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; CHECK: %[[LCSSA:.*]] = phi i32 [ %[[BV]], %{{.*}} ]
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; CHECK: ret i32 %[[LCSSA]]
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}
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declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i1)
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