Sander de Smalen c69944c6b0 [AArch64][SVE] Asm: Support for ADR instruction. ... Supporting various addressing modes: - adr z0.s, [z0.s, z0.s] - adr z0.s, [z0.s, z0.s, lsl #<shift>] - adr z0.d, [z0.d, z0.d] - adr z0.d, [z0.d, z0.d, lsl #<shift>] - adr z0.d, [z0.d, z0.d, uxtw #<shift>] - adr z0.d, [z0.d, z0.d, sxtw #<shift>] Reviewers: rengolin, fhahn, SjoerdMeijer, samparker, javed.absar Reviewed By: SjoerdMeijer Differential Revision: https://reviews.llvm.org/D48870 llvm-svn: 336533		2018-07-09 09:58:24 +00:00
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AArch64AsmParser.cpp	[AArch64][SVE] Asm: Support for ADR instruction.	2018-07-09 09:58:24 +00:00
CMakeLists.txt	…
LLVMBuild.txt	…