.. |
LoadStoreVectorizer.ll
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[NVPTX] Added support for .f16x2 instructions.
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2017-02-23 22:38:24 +00:00 |
MachineSink-call.ll
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MachineSink-convergent.ll
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TailDuplication-convergent.ll
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access-non-generic.ll
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[NVPTX] Use addrspacecast instead of target-specific intrinsics in NVPTXGenericToNVVM.
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2018-02-28 23:57:48 +00:00 |
add-128bit.ll
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[DAGCombiner] add missing folds for scalar select of {-1,0,1}
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2017-02-24 17:17:33 +00:00 |
addrspacecast-gvar.ll
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addrspacecast.ll
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[NVPTX] Added a feature to use short pointers for const/local/shared AS.
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2018-05-09 23:46:19 +00:00 |
aggr-param.ll
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…
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aggregate-return.ll
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[NVPTX] Unify vectorization of load/stores of aggregate arguments and return values.
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2017-02-21 22:56:05 +00:00 |
alias.ll
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annotations.ll
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arg-lowering.ll
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arithmetic-fp-sm20.ll
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arithmetic-int.ll
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atomics-sm60.ll
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[NVPTX] Implement __nvvm_atom_add_gen_d builtin.
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2017-11-07 22:10:54 +00:00 |
atomics-with-scope.ll
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atomics.ll
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barrier.ll
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[NVPTX] Implemented bar.warp.sync, barrier.sync, and vote{.sync} instructions/intrinsics/builtins.
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2017-09-21 18:44:49 +00:00 |
bfe.ll
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…
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branch-fold.ll
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bug17709.ll
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[NVPTX] Don't flag StoreParam/LoadParam memory chain operands as ReadMem/WriteMem (PR32146)
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2017-05-15 17:17:44 +00:00 |
bug21465.ll
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bug22246.ll
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bug22322.ll
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DAG: Check no-signed-zeros instead of unsafe-fp-math
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2018-08-12 19:09:12 +00:00 |
bug26185-2.ll
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bug26185.ll
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bypass-div.ll
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call-with-alloca-buffer.ll
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callchain.ll
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calling-conv.ll
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calls-with-phi.ll
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[NVPTX] Allow libcalls that are defined in the current module.
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2018-12-26 19:12:31 +00:00 |
combine-min-max.ll
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[NVPTX] Implement min/max in tablegen, rather than with custom DAGComine logic.
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2017-01-18 00:09:01 +00:00 |
compare-int.ll
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constant-vectors.ll
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convergent-mir-call.ll
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convert-fp.ll
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[NVPTX] Add fptosi tests to convert-fp.ll.
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2017-01-15 16:55:54 +00:00 |
convert-int-sm20.ll
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ctlz.ll
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NFC - Various typo fixes in tests
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2018-07-04 13:28:39 +00:00 |
ctpop.ll
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[NVPTX] Don't flag StoreRetVal memory chain operands as ReadMem (PR32146)
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2017-05-12 19:56:43 +00:00 |
cttz.ll
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[NVPTX] Don't flag StoreRetVal memory chain operands as ReadMem (PR32146)
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2017-05-12 19:56:43 +00:00 |
disable-opt.ll
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div-ri.ll
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divrem-combine.ll
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envreg.ll
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extloadv.ll
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f16-instructions.ll
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[NVPTX] Fix the codegen for llvm.round.
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2019-04-01 16:10:26 +00:00 |
f16x2-instructions.ll
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[NVPTX] Fix the codegen for llvm.round.
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2019-04-01 16:10:26 +00:00 |
fast-math.ll
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[NVPTX] Enable combineRepeatedFPDivisors for NVPTX.
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2017-02-03 15:13:50 +00:00 |
fcos-no-fast-math.ll
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[NVPTX] Only lower sin/cos to approximate instructions if unsafe math is allowed.
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2017-01-13 18:48:13 +00:00 |
fma-assoc.ll
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[DAGCombine] require UnsafeFPMath for re-association of addition
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2017-01-31 14:35:37 +00:00 |
fma-disable.ll
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fma.ll
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[NVPTX] Don't flag StoreParam/LoadParam memory chain operands as ReadMem/WriteMem (PR32146)
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2017-05-15 17:17:44 +00:00 |
fns.ll
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[NVPTX,CUDA] Added llvm.nvvm.fns intrinsic and matching __nvvm_fns builtin in clang.
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2017-12-06 17:50:05 +00:00 |
fp-contract.ll
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fp-literals.ll
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fp16.ll
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fsin-no-fast-math.ll
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[NVPTX] Only lower sin/cos to approximate instructions if unsafe math is allowed.
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2017-01-13 18:48:13 +00:00 |
function-align.ll
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generic-to-nvvm-ir.ll
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[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
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2018-05-09 02:40:45 +00:00 |
generic-to-nvvm.ll
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[NVPTX] Use addrspacecast instead of target-specific intrinsics in NVPTXGenericToNVVM.
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2018-02-28 23:57:48 +00:00 |
global-addrspace.ll
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global-ctor-empty.ll
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global-ctor.ll
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global-dtor.ll
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global-ordering.ll
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global-variable-big.ll
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[NVPTX] Support global variables of integer type larger than i64.
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2017-01-18 00:29:53 +00:00 |
global-visibility.ll
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globals_init.ll
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globals_lowering.ll
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gvar-init.ll
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half.ll
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[NVPTX] add support for initializing fp16 arrays.
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2018-04-06 22:25:08 +00:00 |
i1-global.ll
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i1-int-to-fp.ll
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i1-param.ll
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i8-param.ll
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[NVPTX] Don't flag StoreParam/LoadParam memory chain operands as ReadMem/WriteMem (PR32146)
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2017-05-15 17:17:44 +00:00 |
i128-global.ll
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[NVPTX] Add lowering of i128 params.
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2017-07-20 21:16:03 +00:00 |
i128-param.ll
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[NVPTX] Add lowering of i128 params.
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2017-07-20 21:16:03 +00:00 |
i128-retval.ll
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[NVPTX] Add lowering of i128 params.
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2017-07-20 21:16:03 +00:00 |
i128-struct.ll
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[NVPTX] Add lowering of i128 numbers as struct fields
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2018-12-01 00:21:52 +00:00 |
idioms.ll
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[NVPTX] Lower integer absolute value idiom to abs instruction.
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2017-01-18 00:08:44 +00:00 |
imad.ll
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inline-asm.ll
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inlineasm-output-template.ll
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[AsmPrinter] refactor to support %c w/ GlobalAddress'
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2019-04-26 18:45:04 +00:00 |
intrin-nocapture.ll
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intrinsic-old.ll
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[FileCheck] Add -allow-deprecated-dag-overlap to failing llvm tests
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2018-07-11 20:25:49 +00:00 |
intrinsics.ll
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[NVPTX] Some nvvm.read.ptx.sreg intrinsics should have IntrInaccessibleMemOnly attribute.
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2019-01-26 00:28:32 +00:00 |
isspacep.ll
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ld-addrspace.ll
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[NVPTX] Added a feature to use short pointers for const/local/shared AS.
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2018-05-09 23:46:19 +00:00 |
ld-generic.ll
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ld-st-addrrspace.py
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Python compat - print statement
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2019-01-03 14:11:33 +00:00 |
ldg-invariant.ll
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[NVPTX] Fixed vectorized LDG for f16.
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2018-04-06 21:10:24 +00:00 |
ldparam-v4.ll
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[NVPTX] Unify vectorization of load/stores of aggregate arguments and return values.
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2017-02-21 22:56:05 +00:00 |
ldu-i8.ll
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ldu-ldg.ll
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ldu-reg-plus-offset.ll
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libcall-fulfilled.ll
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[NVPTX] Allow libcalls that are defined in the current module.
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2018-12-26 19:12:31 +00:00 |
libcall-instruction.ll
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[NVPTX] Allow libcalls that are defined in the current module.
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2018-12-26 19:12:31 +00:00 |
libcall-intrinsic.ll
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[NVPTX] Allow libcalls that are defined in the current module.
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2018-12-26 19:12:31 +00:00 |
lit.local.cfg
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load-sext-i1.ll
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load-store.ll
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SelectionDAG: accommodate atomic floating stores.
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2019-05-10 11:23:04 +00:00 |
load-with-non-coherent-cache.ll
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local-stack-frame.ll
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loop-vectorize.ll
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lower-aggr-copies.ll
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Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
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2018-01-19 17:13:12 +00:00 |
lower-alloca.ll
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NVPTX: Move InferAddressSpaces to generic code
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2017-01-31 01:10:58 +00:00 |
lower-kernel-ptr-arg.ll
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machine-sink.ll
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managed.ll
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match.ll
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[NVPTX] added match.{any,all}.sync instructions, intrinsics & builtins.
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2017-09-26 17:07:23 +00:00 |
math-intrins.ll
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[NVPTX] Fix the codegen for llvm.round.
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2019-04-01 16:10:26 +00:00 |
minmax-negative.ll
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Improve clamp recognition in ValueTracking.
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2017-10-27 20:53:41 +00:00 |
misaligned-vector-ldst.ll
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[NVPTX] Fixed lowering of unaligned loads/stores of f16 scalars and vectors.
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2017-03-07 20:33:38 +00:00 |
module-inline-asm.ll
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mulwide.ll
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named-barriers.ll
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[NVPTX] Add intrinsics to support named barriers.
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2017-01-28 16:38:15 +00:00 |
noduplicate-syncthreads.ll
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nofunc.ll
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[NVPTX] do not rely on cached subtarget info.
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2018-12-12 18:31:04 +00:00 |
nounroll.ll
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nvcl-param-align.ll
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nvvm-reflect-arch.ll
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[NVPTX] Handle __nvvm_reflect("__CUDA_ARCH").
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2018-08-03 18:05:24 +00:00 |
nvvm-reflect-module-flag.ll
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nvvm-reflect.ll
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[NVPTX] Let there be One True Way to set NVVMReflect params.
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2017-01-15 16:54:35 +00:00 |
param-align.ll
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param-load-store.ll
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[Codegen] fix typos in test case
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2019-03-02 08:03:59 +00:00 |
pr13291-i1-store.ll
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pr16278.ll
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pr17529.ll
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proxy-reg-erasure-mir.ll
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[NVPTX] Allow libcalls that are defined in the current module.
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2018-12-26 19:12:31 +00:00 |
proxy-reg-erasure-ptx.ll
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[NVPTX] Allow libcalls that are defined in the current module.
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2018-12-26 19:12:31 +00:00 |
read-global-variable-constant.ll
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[NVPTX] Lower loads from global constants using ld.global.nc (aka LDG).
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2018-02-28 23:58:05 +00:00 |
refl1.ll
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reg-copy.ll
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reg-types.ll
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rotate.ll
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sched1.ll
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Only enable LiveRangeShrink for x86.
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2017-05-17 20:18:13 +00:00 |
sched2.ll
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Only enable LiveRangeShrink for x86.
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2017-05-17 20:18:13 +00:00 |
sext-in-reg.ll
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sext-params.ll
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shfl-sync.ll
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[NVPTX] Implemented shfl.sync instruction and supporting intrinsics/builtins.
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2017-09-20 21:23:07 +00:00 |
shfl.ll
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shift-parts.ll
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simple-call.ll
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[NVPTX] Don't flag StoreParam/LoadParam memory chain operands as ReadMem/WriteMem (PR32146)
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2017-05-15 17:17:44 +00:00 |
sm-version-20.ll
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sm-version-21.ll
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sm-version-30.ll
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sm-version-32.ll
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sm-version-35.ll
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sm-version-37.ll
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sm-version-50.ll
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sm-version-52.ll
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sm-version-53.ll
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sm-version-60.ll
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sm-version-61.ll
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sm-version-62.ll
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sm-version-70.ll
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[CUDA] Added rudimentary support for CUDA-9 and sm_70.
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2017-09-07 18:14:32 +00:00 |
speculative-execution-divergent-target.ll
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sqrt-approx.ll
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[NVPTX] Compute approx sqrt as 1/rsqrt(x) rather than x*rsqrt(x).
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2017-01-31 23:08:57 +00:00 |
st-addrspace.ll
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[NVPTX] Added a feature to use short pointers for const/local/shared AS.
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2018-05-09 23:46:19 +00:00 |
st-generic.ll
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…
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surf-read-cuda.ll
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surf-read.ll
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surf-write-cuda.ll
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surf-write.ll
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symbol-naming.ll
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[NVPTX] Assign valid global names
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2017-12-04 14:19:33 +00:00 |
tex-read-cuda.ll
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tex-read.ll
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texsurf-queries.ll
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tid-range.ll
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[SelectionDAG] Correctly transform range metadata to AssertZExt
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2017-01-06 00:11:46 +00:00 |
tuple-literal.ll
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vec-param-load.ll
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[NVPTX] Unify vectorization of load/stores of aggregate arguments and return values.
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2017-02-21 22:56:05 +00:00 |
vec8.ll
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Revert r302938 "Add LiveRangeShrink pass to shrink live range within BB."
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2017-05-18 18:50:05 +00:00 |
vector-args.ll
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vector-call.ll
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[NVPTX] Don't flag StoreParam/LoadParam memory chain operands as ReadMem/WriteMem (PR32146)
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2017-05-15 17:17:44 +00:00 |
vector-compare.ll
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vector-global.ll
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vector-loads.ll
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vector-select.ll
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vector-stores.ll
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vectorize-misaligned.ll
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[NVPTX] Implement isLegalToVectorizeLoadChain
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2018-08-27 17:29:43 +00:00 |
vote.ll
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[NVPTX] Implemented bar.warp.sync, barrier.sync, and vote{.sync} instructions/intrinsics/builtins.
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2017-09-21 18:44:49 +00:00 |
weak-global.ll
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weak-linkage.ll
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wmma.py
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PTX 6.3 extends `wmma` instruction to support s8/u8/s4/u4/b1 -> s32.
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2019-04-25 22:27:57 +00:00 |
zeroext-32bit.ll
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[NVPTX] Don't flag StoreParam/LoadParam memory chain operands as ReadMem/WriteMem (PR32146)
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2017-05-15 17:17:44 +00:00 |