forked from OSchip/llvm-project
165 lines
9.2 KiB
C
165 lines
9.2 KiB
C
// REQUIRES: aarch64-registered-target
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// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
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// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
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// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t
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// RUN: FileCheck --check-prefix=ASM --allow-empty %s <%t
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// If this check fails please read test/CodeGen/aarch64-sve-intrinsics/README for instructions on how to resolve it.
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// ASM-NOT: warning
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#include <arm_sve.h>
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#ifdef SVE_OVERLOADED_FORMS
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// A simple used,unused... macro, long enough to represent any SVE builtin.
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#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
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#else
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#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
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#endif
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svint8_t test_svasrd_n_s8_z(svbool_t pg, svint8_t op1)
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{
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// CHECK-LABEL: test_svasrd_n_s8_z
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// CHECK: %[[SEL:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sel.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> zeroinitializer)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.asrd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %[[SEL]], i32 1)
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// CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svasrd,_n_s8,_z,)(pg, op1, 1);
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}
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svint8_t test_svasrd_n_s8_z_1(svbool_t pg, svint8_t op1)
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{
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// CHECK-LABEL: test_svasrd_n_s8_z_1
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// CHECK: %[[SEL:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sel.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> zeroinitializer)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.asrd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %[[SEL]], i32 8)
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// CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svasrd,_n_s8,_z,)(pg, op1, 8);
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}
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svint16_t test_svasrd_n_s16_z(svbool_t pg, svint16_t op1)
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{
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// CHECK-LABEL: test_svasrd_n_s16_z
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// CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
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// CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sel.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> zeroinitializer)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.asrd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %[[SEL]], i32 1)
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// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svasrd,_n_s16,_z,)(pg, op1, 1);
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}
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svint16_t test_svasrd_n_s16_z_1(svbool_t pg, svint16_t op1)
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{
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// CHECK-LABEL: test_svasrd_n_s16_z_1
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// CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
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// CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sel.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> zeroinitializer)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.asrd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %[[SEL]], i32 16)
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// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svasrd,_n_s16,_z,)(pg, op1, 16);
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}
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svint32_t test_svasrd_n_s32_z(svbool_t pg, svint32_t op1)
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{
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// CHECK-LABEL: test_svasrd_n_s32_z
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// CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
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// CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sel.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> zeroinitializer)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.asrd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %[[SEL]], i32 1)
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// CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svasrd,_n_s32,_z,)(pg, op1, 1);
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}
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svint32_t test_svasrd_n_s32_z_1(svbool_t pg, svint32_t op1)
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{
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// CHECK-LABEL: test_svasrd_n_s32_z_1
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// CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
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// CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sel.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> zeroinitializer)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.asrd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %[[SEL]], i32 32)
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// CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svasrd,_n_s32,_z,)(pg, op1, 32);
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}
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svint64_t test_svasrd_n_s64_z(svbool_t pg, svint64_t op1)
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{
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// CHECK-LABEL: test_svasrd_n_s64_z
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// CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
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// CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sel.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> zeroinitializer)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.asrd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %[[SEL]], i32 1)
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// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svasrd,_n_s64,_z,)(pg, op1, 1);
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}
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svint64_t test_svasrd_n_s64_z_1(svbool_t pg, svint64_t op1)
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{
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// CHECK-LABEL: test_svasrd_n_s64_z_1
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// CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
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// CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sel.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> zeroinitializer)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.asrd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %[[SEL]], i32 64)
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// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svasrd,_n_s64,_z,)(pg, op1, 64);
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}
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svint8_t test_svasrd_n_s8_m(svbool_t pg, svint8_t op1)
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{
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// CHECK-LABEL: test_svasrd_n_s8_m
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.asrd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, i32 1)
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// CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svasrd,_n_s8,_m,)(pg, op1, 1);
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}
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svint16_t test_svasrd_n_s16_m(svbool_t pg, svint16_t op1)
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{
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// CHECK-LABEL: test_svasrd_n_s16_m
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// CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.asrd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, i32 1)
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// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svasrd,_n_s16,_m,)(pg, op1, 1);
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}
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svint32_t test_svasrd_n_s32_m(svbool_t pg, svint32_t op1)
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{
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// CHECK-LABEL: test_svasrd_n_s32_m
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// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.asrd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, i32 1)
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// CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svasrd,_n_s32,_m,)(pg, op1, 1);
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}
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svint64_t test_svasrd_n_s64_m(svbool_t pg, svint64_t op1)
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{
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// CHECK-LABEL: test_svasrd_n_s64_m
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// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.asrd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, i32 1)
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// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svasrd,_n_s64,_m,)(pg, op1, 1);
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}
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svint8_t test_svasrd_n_s8_x(svbool_t pg, svint8_t op1)
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{
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// CHECK-LABEL: test_svasrd_n_s8_x
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.asrd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, i32 8)
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// CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svasrd,_n_s8,_x,)(pg, op1, 8);
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}
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svint16_t test_svasrd_n_s16_x(svbool_t pg, svint16_t op1)
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{
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// CHECK-LABEL: test_svasrd_n_s16_x
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// CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.asrd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, i32 16)
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// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svasrd,_n_s16,_x,)(pg, op1, 16);
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}
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svint32_t test_svasrd_n_s32_x(svbool_t pg, svint32_t op1)
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{
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// CHECK-LABEL: test_svasrd_n_s32_x
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// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.asrd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, i32 32)
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// CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svasrd,_n_s32,_x,)(pg, op1, 32);
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}
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svint64_t test_svasrd_n_s64_x(svbool_t pg, svint64_t op1)
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{
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// CHECK-LABEL: test_svasrd_n_s64_x
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// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.asrd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, i32 64)
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// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svasrd,_n_s64,_x,)(pg, op1, 64);
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}
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