forked from OSchip/llvm-project
384 lines
18 KiB
MLIR
384 lines
18 KiB
MLIR
// RUN: mlir-opt -split-input-file -convert-memref-to-spirv="bool-num-bits=8" %s -o - | FileCheck %s
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// Check that with proper compute and storage extensions, we don't need to
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// perform special tricks.
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module attributes {
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spv.target_env = #spv.target_env<
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#spv.vce<v1.0,
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[
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Shader, Int8, Int16, Int64, Float16, Float64,
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StorageBuffer16BitAccess, StorageUniform16, StoragePushConstant16,
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StorageBuffer8BitAccess, UniformAndStorageBuffer8BitAccess, StoragePushConstant8
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],
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[SPV_KHR_16bit_storage, SPV_KHR_8bit_storage, SPV_KHR_storage_buffer_storage_class]>, {}>
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} {
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// CHECK-LABEL: @load_store_zero_rank_float
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func @load_store_zero_rank_float(%arg0: memref<f32>, %arg1: memref<f32>) {
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// CHECK: [[ARG0:%.*]] = builtin.unrealized_conversion_cast {{.+}} : memref<f32> to !spv.ptr<!spv.struct<(!spv.array<1 x f32, stride=4> [0])>, StorageBuffer>
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// CHECK: [[ARG1:%.*]] = builtin.unrealized_conversion_cast {{.+}} : memref<f32> to !spv.ptr<!spv.struct<(!spv.array<1 x f32, stride=4> [0])>, StorageBuffer>
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// CHECK: [[ZERO1:%.*]] = spv.Constant 0 : i32
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// CHECK: spv.AccessChain [[ARG0]][
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// CHECK-SAME: [[ZERO1]], [[ZERO1]]
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// CHECK-SAME: ] :
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// CHECK: spv.Load "StorageBuffer" %{{.*}} : f32
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%0 = memref.load %arg0[] : memref<f32>
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// CHECK: [[ZERO2:%.*]] = spv.Constant 0 : i32
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// CHECK: spv.AccessChain [[ARG1]][
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// CHECK-SAME: [[ZERO2]], [[ZERO2]]
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// CHECK-SAME: ] :
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// CHECK: spv.Store "StorageBuffer" %{{.*}} : f32
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memref.store %0, %arg1[] : memref<f32>
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return
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}
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// CHECK-LABEL: @load_store_zero_rank_int
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func @load_store_zero_rank_int(%arg0: memref<i32>, %arg1: memref<i32>) {
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// CHECK: [[ARG0:%.*]] = builtin.unrealized_conversion_cast {{.+}} : memref<i32> to !spv.ptr<!spv.struct<(!spv.array<1 x i32, stride=4> [0])>, StorageBuffer>
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// CHECK: [[ARG1:%.*]] = builtin.unrealized_conversion_cast {{.+}} : memref<i32> to !spv.ptr<!spv.struct<(!spv.array<1 x i32, stride=4> [0])>, StorageBuffer>
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// CHECK: [[ZERO1:%.*]] = spv.Constant 0 : i32
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// CHECK: spv.AccessChain [[ARG0]][
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// CHECK-SAME: [[ZERO1]], [[ZERO1]]
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// CHECK-SAME: ] :
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// CHECK: spv.Load "StorageBuffer" %{{.*}} : i32
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%0 = memref.load %arg0[] : memref<i32>
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// CHECK: [[ZERO2:%.*]] = spv.Constant 0 : i32
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// CHECK: spv.AccessChain [[ARG1]][
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// CHECK-SAME: [[ZERO2]], [[ZERO2]]
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// CHECK-SAME: ] :
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// CHECK: spv.Store "StorageBuffer" %{{.*}} : i32
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memref.store %0, %arg1[] : memref<i32>
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return
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}
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// CHECK-LABEL: func @load_store_unknown_dim
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func @load_store_unknown_dim(%i: index, %source: memref<?xi32>, %dest: memref<?xi32>) {
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// CHECK: %[[SRC:.+]] = builtin.unrealized_conversion_cast {{.+}} : memref<?xi32> to !spv.ptr<!spv.struct<(!spv.rtarray<i32, stride=4> [0])>, StorageBuffer>
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// CHECK: %[[DST:.+]] = builtin.unrealized_conversion_cast {{.+}} : memref<?xi32> to !spv.ptr<!spv.struct<(!spv.rtarray<i32, stride=4> [0])>, StorageBuffer>
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// CHECK: %[[AC0:.+]] = spv.AccessChain %[[SRC]]
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// CHECK: spv.Load "StorageBuffer" %[[AC0]]
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%0 = memref.load %source[%i] : memref<?xi32>
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// CHECK: %[[AC1:.+]] = spv.AccessChain %[[DST]]
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// CHECK: spv.Store "StorageBuffer" %[[AC1]]
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memref.store %0, %dest[%i]: memref<?xi32>
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return
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}
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// CHECK-LABEL: func @load_i1
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// CHECK-SAME: (%[[SRC:.+]]: memref<4xi1>, %[[IDX:.+]]: index)
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func @load_i1(%src: memref<4xi1>, %i : index) -> i1 {
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// CHECK-DAG: %[[SRC_CAST:.+]] = builtin.unrealized_conversion_cast %[[SRC]] : memref<4xi1> to !spv.ptr<!spv.struct<(!spv.array<4 x i8, stride=1> [0])>, StorageBuffer>
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// CHECK-DAG: %[[IDX_CAST:.+]] = builtin.unrealized_conversion_cast %[[IDX]]
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// CHECK: %[[ZERO_0:.+]] = spv.Constant 0 : i32
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// CHECK: %[[ZERO_1:.+]] = spv.Constant 0 : i32
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// CHECK: %[[ONE:.+]] = spv.Constant 1 : i32
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// CHECK: %[[MUL:.+]] = spv.IMul %[[ONE]], %[[IDX_CAST]] : i32
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// CHECK: %[[ADD:.+]] = spv.IAdd %[[ZERO_1]], %[[MUL]] : i32
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// CHECK: %[[ADDR:.+]] = spv.AccessChain %[[SRC_CAST]][%[[ZERO_0]], %[[ADD]]]
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// CHECK: %[[VAL:.+]] = spv.Load "StorageBuffer" %[[ADDR]] : i8
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// CHECK: %[[ONE_I8:.+]] = spv.Constant 1 : i8
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// CHECK: %[[BOOL:.+]] = spv.IEqual %[[VAL]], %[[ONE_I8]] : i8
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%0 = memref.load %src[%i] : memref<4xi1>
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// CHECK: return %[[BOOL]]
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return %0: i1
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}
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// CHECK-LABEL: func @store_i1
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// CHECK-SAME: %[[DST:.+]]: memref<4xi1>,
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// CHECK-SAME: %[[IDX:.+]]: index
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func @store_i1(%dst: memref<4xi1>, %i: index) {
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%true = arith.constant true
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// CHECK-DAG: %[[DST_CAST:.+]] = builtin.unrealized_conversion_cast %[[DST]] : memref<4xi1> to !spv.ptr<!spv.struct<(!spv.array<4 x i8, stride=1> [0])>, StorageBuffer>
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// CHECK-DAG: %[[IDX_CAST:.+]] = builtin.unrealized_conversion_cast %[[IDX]]
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// CHECK: %[[ZERO_0:.+]] = spv.Constant 0 : i32
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// CHECK: %[[ZERO_1:.+]] = spv.Constant 0 : i32
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// CHECK: %[[ONE:.+]] = spv.Constant 1 : i32
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// CHECK: %[[MUL:.+]] = spv.IMul %[[ONE]], %[[IDX_CAST]] : i32
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// CHECK: %[[ADD:.+]] = spv.IAdd %[[ZERO_1]], %[[MUL]] : i32
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// CHECK: %[[ADDR:.+]] = spv.AccessChain %[[DST_CAST]][%[[ZERO_0]], %[[ADD]]]
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// CHECK: %[[ZERO_I8:.+]] = spv.Constant 0 : i8
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// CHECK: %[[ONE_I8:.+]] = spv.Constant 1 : i8
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// CHECK: %[[RES:.+]] = spv.Select %{{.+}}, %[[ONE_I8]], %[[ZERO_I8]] : i1, i8
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// CHECK: spv.Store "StorageBuffer" %[[ADDR]], %[[RES]] : i8
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memref.store %true, %dst[%i]: memref<4xi1>
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return
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}
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} // end module
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// -----
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// Check that access chain indices are properly adjusted if non-32-bit types are
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// emulated via 32-bit types.
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// TODO: Test i64 types.
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module attributes {
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spv.target_env = #spv.target_env<
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#spv.vce<v1.0, [Shader], [SPV_KHR_storage_buffer_storage_class]>, {}>
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} {
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// CHECK-LABEL: @load_i1
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func @load_i1(%arg0: memref<i1>) -> i1 {
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// CHECK: %[[ZERO:.+]] = spv.Constant 0 : i32
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// CHECK: %[[FOUR1:.+]] = spv.Constant 4 : i32
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// CHECK: %[[QUOTIENT:.+]] = spv.SDiv %[[ZERO]], %[[FOUR1]] : i32
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// CHECK: %[[PTR:.+]] = spv.AccessChain %{{.+}}[%[[ZERO]], %[[QUOTIENT]]]
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// CHECK: %[[LOAD:.+]] = spv.Load "StorageBuffer" %[[PTR]]
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// CHECK: %[[FOUR2:.+]] = spv.Constant 4 : i32
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// CHECK: %[[EIGHT:.+]] = spv.Constant 8 : i32
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// CHECK: %[[IDX:.+]] = spv.UMod %[[ZERO]], %[[FOUR2]] : i32
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// CHECK: %[[BITS:.+]] = spv.IMul %[[IDX]], %[[EIGHT]] : i32
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// CHECK: %[[VALUE:.+]] = spv.ShiftRightArithmetic %[[LOAD]], %[[BITS]] : i32, i32
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// CHECK: %[[MASK:.+]] = spv.Constant 255 : i32
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// CHECK: %[[T1:.+]] = spv.BitwiseAnd %[[VALUE]], %[[MASK]] : i32
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// CHECK: %[[T2:.+]] = spv.Constant 24 : i32
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// CHECK: %[[T3:.+]] = spv.ShiftLeftLogical %[[T1]], %[[T2]] : i32, i32
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// CHECK: %[[T4:.+]] = spv.ShiftRightArithmetic %[[T3]], %[[T2]] : i32, i32
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// Convert to i1 type.
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// CHECK: %[[ONE:.+]] = spv.Constant 1 : i32
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// CHECK: %[[RES:.+]] = spv.IEqual %[[T4]], %[[ONE]] : i32
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// CHECK: return %[[RES]]
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%0 = memref.load %arg0[] : memref<i1>
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return %0 : i1
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}
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// CHECK-LABEL: @load_i8
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func @load_i8(%arg0: memref<i8>) {
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// CHECK: %[[ZERO:.+]] = spv.Constant 0 : i32
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// CHECK: %[[FOUR1:.+]] = spv.Constant 4 : i32
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// CHECK: %[[QUOTIENT:.+]] = spv.SDiv %[[ZERO]], %[[FOUR1]] : i32
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// CHECK: %[[PTR:.+]] = spv.AccessChain %{{.+}}[%[[ZERO]], %[[QUOTIENT]]]
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// CHECK: %[[LOAD:.+]] = spv.Load "StorageBuffer" %[[PTR]]
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// CHECK: %[[FOUR2:.+]] = spv.Constant 4 : i32
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// CHECK: %[[EIGHT:.+]] = spv.Constant 8 : i32
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// CHECK: %[[IDX:.+]] = spv.UMod %[[ZERO]], %[[FOUR2]] : i32
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// CHECK: %[[BITS:.+]] = spv.IMul %[[IDX]], %[[EIGHT]] : i32
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// CHECK: %[[VALUE:.+]] = spv.ShiftRightArithmetic %[[LOAD]], %[[BITS]] : i32, i32
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// CHECK: %[[MASK:.+]] = spv.Constant 255 : i32
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// CHECK: %[[T1:.+]] = spv.BitwiseAnd %[[VALUE]], %[[MASK]] : i32
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// CHECK: %[[T2:.+]] = spv.Constant 24 : i32
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// CHECK: %[[T3:.+]] = spv.ShiftLeftLogical %[[T1]], %[[T2]] : i32, i32
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// CHECK: spv.ShiftRightArithmetic %[[T3]], %[[T2]] : i32, i32
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%0 = memref.load %arg0[] : memref<i8>
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return
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}
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// CHECK-LABEL: @load_i16
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// CHECK: (%[[ARG0:.+]]: {{.*}}, %[[ARG1:.+]]: index)
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func @load_i16(%arg0: memref<10xi16>, %index : index) {
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// CHECK: %[[ARG1_CAST:.+]] = builtin.unrealized_conversion_cast %[[ARG1]] : index to i32
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// CHECK: %[[ZERO:.+]] = spv.Constant 0 : i32
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// CHECK: %[[OFFSET:.+]] = spv.Constant 0 : i32
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// CHECK: %[[ONE:.+]] = spv.Constant 1 : i32
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// CHECK: %[[UPDATE:.+]] = spv.IMul %[[ONE]], %[[ARG1_CAST]] : i32
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// CHECK: %[[FLAT_IDX:.+]] = spv.IAdd %[[OFFSET]], %[[UPDATE]] : i32
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// CHECK: %[[TWO1:.+]] = spv.Constant 2 : i32
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// CHECK: %[[QUOTIENT:.+]] = spv.SDiv %[[FLAT_IDX]], %[[TWO1]] : i32
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// CHECK: %[[PTR:.+]] = spv.AccessChain %{{.+}}[%[[ZERO]], %[[QUOTIENT]]]
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// CHECK: %[[LOAD:.+]] = spv.Load "StorageBuffer" %[[PTR]]
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// CHECK: %[[TWO2:.+]] = spv.Constant 2 : i32
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// CHECK: %[[SIXTEEN:.+]] = spv.Constant 16 : i32
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// CHECK: %[[IDX:.+]] = spv.UMod %[[FLAT_IDX]], %[[TWO2]] : i32
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// CHECK: %[[BITS:.+]] = spv.IMul %[[IDX]], %[[SIXTEEN]] : i32
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// CHECK: %[[VALUE:.+]] = spv.ShiftRightArithmetic %[[LOAD]], %[[BITS]] : i32, i32
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// CHECK: %[[MASK:.+]] = spv.Constant 65535 : i32
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// CHECK: %[[T1:.+]] = spv.BitwiseAnd %[[VALUE]], %[[MASK]] : i32
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// CHECK: %[[T2:.+]] = spv.Constant 16 : i32
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// CHECK: %[[T3:.+]] = spv.ShiftLeftLogical %[[T1]], %[[T2]] : i32, i32
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// CHECK: spv.ShiftRightArithmetic %[[T3]], %[[T2]] : i32, i32
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%0 = memref.load %arg0[%index] : memref<10xi16>
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return
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}
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// CHECK-LABEL: @load_i32
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func @load_i32(%arg0: memref<i32>) {
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// CHECK-NOT: spv.SDiv
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// CHECK: spv.Load
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// CHECK-NOT: spv.ShiftRightArithmetic
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%0 = memref.load %arg0[] : memref<i32>
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return
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}
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// CHECK-LABEL: @load_f32
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func @load_f32(%arg0: memref<f32>) {
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// CHECK-NOT: spv.SDiv
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// CHECK: spv.Load
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// CHECK-NOT: spv.ShiftRightArithmetic
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%0 = memref.load %arg0[] : memref<f32>
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return
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}
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// CHECK-LABEL: @store_i1
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// CHECK: (%[[ARG0:.+]]: {{.*}}, %[[ARG1:.+]]: i1)
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func @store_i1(%arg0: memref<i1>, %value: i1) {
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// CHECK: %[[ARG0_CAST:.+]] = builtin.unrealized_conversion_cast %[[ARG0]]
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// CHECK: %[[ZERO:.+]] = spv.Constant 0 : i32
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// CHECK: %[[FOUR:.+]] = spv.Constant 4 : i32
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// CHECK: %[[EIGHT:.+]] = spv.Constant 8 : i32
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// CHECK: %[[IDX:.+]] = spv.UMod %[[ZERO]], %[[FOUR]] : i32
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// CHECK: %[[OFFSET:.+]] = spv.IMul %[[IDX]], %[[EIGHT]] : i32
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// CHECK: %[[MASK1:.+]] = spv.Constant 255 : i32
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// CHECK: %[[TMP1:.+]] = spv.ShiftLeftLogical %[[MASK1]], %[[OFFSET]] : i32, i32
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// CHECK: %[[MASK:.+]] = spv.Not %[[TMP1]] : i32
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// CHECK: %[[ZERO1:.+]] = spv.Constant 0 : i32
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// CHECK: %[[ONE1:.+]] = spv.Constant 1 : i32
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// CHECK: %[[CASTED_ARG1:.+]] = spv.Select %[[ARG1]], %[[ONE1]], %[[ZERO1]] : i1, i32
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// CHECK: %[[CLAMPED_VAL:.+]] = spv.BitwiseAnd %[[CASTED_ARG1]], %[[MASK1]] : i32
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// CHECK: %[[STORE_VAL:.+]] = spv.ShiftLeftLogical %[[CLAMPED_VAL]], %[[OFFSET]] : i32, i32
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// CHECK: %[[FOUR2:.+]] = spv.Constant 4 : i32
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// CHECK: %[[ACCESS_IDX:.+]] = spv.SDiv %[[ZERO]], %[[FOUR2]] : i32
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// CHECK: %[[PTR:.+]] = spv.AccessChain %[[ARG0_CAST]][%[[ZERO]], %[[ACCESS_IDX]]]
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// CHECK: spv.AtomicAnd "Device" "AcquireRelease" %[[PTR]], %[[MASK]]
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// CHECK: spv.AtomicOr "Device" "AcquireRelease" %[[PTR]], %[[STORE_VAL]]
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memref.store %value, %arg0[] : memref<i1>
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return
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}
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// CHECK-LABEL: @store_i8
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// CHECK: (%[[ARG0:.+]]: {{.*}}, %[[ARG1:.+]]: i8)
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func @store_i8(%arg0: memref<i8>, %value: i8) {
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// CHECK-DAG: %[[ARG1_CAST:.+]] = builtin.unrealized_conversion_cast %[[ARG1]] : i8 to i32
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// CHECK-DAG: %[[ARG0_CAST:.+]] = builtin.unrealized_conversion_cast %[[ARG0]]
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// CHECK: %[[ZERO:.+]] = spv.Constant 0 : i32
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// CHECK: %[[FOUR:.+]] = spv.Constant 4 : i32
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// CHECK: %[[EIGHT:.+]] = spv.Constant 8 : i32
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// CHECK: %[[IDX:.+]] = spv.UMod %[[ZERO]], %[[FOUR]] : i32
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// CHECK: %[[OFFSET:.+]] = spv.IMul %[[IDX]], %[[EIGHT]] : i32
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// CHECK: %[[MASK1:.+]] = spv.Constant 255 : i32
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// CHECK: %[[TMP1:.+]] = spv.ShiftLeftLogical %[[MASK1]], %[[OFFSET]] : i32, i32
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// CHECK: %[[MASK:.+]] = spv.Not %[[TMP1]] : i32
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// CHECK: %[[CLAMPED_VAL:.+]] = spv.BitwiseAnd %[[ARG1_CAST]], %[[MASK1]] : i32
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// CHECK: %[[STORE_VAL:.+]] = spv.ShiftLeftLogical %[[CLAMPED_VAL]], %[[OFFSET]] : i32, i32
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// CHECK: %[[FOUR2:.+]] = spv.Constant 4 : i32
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// CHECK: %[[ACCESS_IDX:.+]] = spv.SDiv %[[ZERO]], %[[FOUR2]] : i32
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// CHECK: %[[PTR:.+]] = spv.AccessChain %[[ARG0_CAST]][%[[ZERO]], %[[ACCESS_IDX]]]
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// CHECK: spv.AtomicAnd "Device" "AcquireRelease" %[[PTR]], %[[MASK]]
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// CHECK: spv.AtomicOr "Device" "AcquireRelease" %[[PTR]], %[[STORE_VAL]]
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memref.store %value, %arg0[] : memref<i8>
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return
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}
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// CHECK-LABEL: @store_i16
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// CHECK: (%[[ARG0:.+]]: memref<10xi16>, %[[ARG1:.+]]: index, %[[ARG2:.+]]: i16)
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func @store_i16(%arg0: memref<10xi16>, %index: index, %value: i16) {
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// CHECK-DAG: %[[ARG2_CAST:.+]] = builtin.unrealized_conversion_cast %[[ARG2]] : i16 to i32
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// CHECK-DAG: %[[ARG0_CAST:.+]] = builtin.unrealized_conversion_cast %[[ARG0]]
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// CHECK-DAG: %[[ARG1_CAST:.+]] = builtin.unrealized_conversion_cast %[[ARG1]] : index to i32
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// CHECK: %[[ZERO:.+]] = spv.Constant 0 : i32
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// CHECK: %[[OFFSET:.+]] = spv.Constant 0 : i32
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// CHECK: %[[ONE:.+]] = spv.Constant 1 : i32
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// CHECK: %[[UPDATE:.+]] = spv.IMul %[[ONE]], %[[ARG1_CAST]] : i32
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// CHECK: %[[FLAT_IDX:.+]] = spv.IAdd %[[OFFSET]], %[[UPDATE]] : i32
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// CHECK: %[[TWO:.+]] = spv.Constant 2 : i32
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// CHECK: %[[SIXTEEN:.+]] = spv.Constant 16 : i32
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// CHECK: %[[IDX:.+]] = spv.UMod %[[FLAT_IDX]], %[[TWO]] : i32
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// CHECK: %[[OFFSET:.+]] = spv.IMul %[[IDX]], %[[SIXTEEN]] : i32
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// CHECK: %[[MASK1:.+]] = spv.Constant 65535 : i32
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// CHECK: %[[TMP1:.+]] = spv.ShiftLeftLogical %[[MASK1]], %[[OFFSET]] : i32, i32
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// CHECK: %[[MASK:.+]] = spv.Not %[[TMP1]] : i32
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// CHECK: %[[CLAMPED_VAL:.+]] = spv.BitwiseAnd %[[ARG2_CAST]], %[[MASK1]] : i32
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// CHECK: %[[STORE_VAL:.+]] = spv.ShiftLeftLogical %[[CLAMPED_VAL]], %[[OFFSET]] : i32, i32
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// CHECK: %[[TWO2:.+]] = spv.Constant 2 : i32
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// CHECK: %[[ACCESS_IDX:.+]] = spv.SDiv %[[FLAT_IDX]], %[[TWO2]] : i32
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// CHECK: %[[PTR:.+]] = spv.AccessChain %[[ARG0_CAST]][%[[ZERO]], %[[ACCESS_IDX]]]
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// CHECK: spv.AtomicAnd "Device" "AcquireRelease" %[[PTR]], %[[MASK]]
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// CHECK: spv.AtomicOr "Device" "AcquireRelease" %[[PTR]], %[[STORE_VAL]]
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memref.store %value, %arg0[%index] : memref<10xi16>
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return
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}
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// CHECK-LABEL: @store_i32
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func @store_i32(%arg0: memref<i32>, %value: i32) {
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// CHECK: spv.Store
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// CHECK-NOT: spv.AtomicAnd
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// CHECK-NOT: spv.AtomicOr
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memref.store %value, %arg0[] : memref<i32>
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return
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}
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// CHECK-LABEL: @store_f32
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func @store_f32(%arg0: memref<f32>, %value: f32) {
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// CHECK: spv.Store
|
|
// CHECK-NOT: spv.AtomicAnd
|
|
// CHECK-NOT: spv.AtomicOr
|
|
memref.store %value, %arg0[] : memref<f32>
|
|
return
|
|
}
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|
|
|
} // end module
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|
|
|
// -----
|
|
|
|
// Check that access chain indices are properly adjusted if non-16/32-bit types
|
|
// are emulated via 32-bit types.
|
|
module attributes {
|
|
spv.target_env = #spv.target_env<
|
|
#spv.vce<v1.0, [Int16, StorageBuffer16BitAccess, Shader],
|
|
[SPV_KHR_storage_buffer_storage_class, SPV_KHR_16bit_storage]>, {}>
|
|
} {
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|
|
|
// CHECK-LABEL: @load_i8
|
|
func @load_i8(%arg0: memref<i8>) {
|
|
// CHECK: %[[ZERO:.+]] = spv.Constant 0 : i32
|
|
// CHECK: %[[FOUR1:.+]] = spv.Constant 4 : i32
|
|
// CHECK: %[[QUOTIENT:.+]] = spv.SDiv %[[ZERO]], %[[FOUR1]] : i32
|
|
// CHECK: %[[PTR:.+]] = spv.AccessChain %{{.+}}[%[[ZERO]], %[[QUOTIENT]]]
|
|
// CHECK: %[[LOAD:.+]] = spv.Load "StorageBuffer" %[[PTR]]
|
|
// CHECK: %[[FOUR2:.+]] = spv.Constant 4 : i32
|
|
// CHECK: %[[EIGHT:.+]] = spv.Constant 8 : i32
|
|
// CHECK: %[[IDX:.+]] = spv.UMod %[[ZERO]], %[[FOUR2]] : i32
|
|
// CHECK: %[[BITS:.+]] = spv.IMul %[[IDX]], %[[EIGHT]] : i32
|
|
// CHECK: %[[VALUE:.+]] = spv.ShiftRightArithmetic %[[LOAD]], %[[BITS]] : i32, i32
|
|
// CHECK: %[[MASK:.+]] = spv.Constant 255 : i32
|
|
// CHECK: %[[T1:.+]] = spv.BitwiseAnd %[[VALUE]], %[[MASK]] : i32
|
|
// CHECK: %[[T2:.+]] = spv.Constant 24 : i32
|
|
// CHECK: %[[T3:.+]] = spv.ShiftLeftLogical %[[T1]], %[[T2]] : i32, i32
|
|
// CHECK: spv.ShiftRightArithmetic %[[T3]], %[[T2]] : i32, i32
|
|
%0 = memref.load %arg0[] : memref<i8>
|
|
return
|
|
}
|
|
|
|
// CHECK-LABEL: @load_i16
|
|
func @load_i16(%arg0: memref<i16>) {
|
|
// CHECK-NOT: spv.SDiv
|
|
// CHECK: spv.Load
|
|
// CHECK-NOT: spv.ShiftRightArithmetic
|
|
%0 = memref.load %arg0[] : memref<i16>
|
|
return
|
|
}
|
|
|
|
// CHECK-LABEL: @store_i8
|
|
// CHECK: (%[[ARG0:.+]]: {{.*}}, %[[ARG1:.+]]: i8)
|
|
func @store_i8(%arg0: memref<i8>, %value: i8) {
|
|
// CHECK-DAG: %[[ARG1_CAST:.+]] = builtin.unrealized_conversion_cast %[[ARG1]] : i8 to i32
|
|
// CHECK-DAG: %[[ARG0_CAST:.+]] = builtin.unrealized_conversion_cast %[[ARG0]]
|
|
// CHECK: %[[ZERO:.+]] = spv.Constant 0 : i32
|
|
// CHECK: %[[FOUR:.+]] = spv.Constant 4 : i32
|
|
// CHECK: %[[EIGHT:.+]] = spv.Constant 8 : i32
|
|
// CHECK: %[[IDX:.+]] = spv.UMod %[[ZERO]], %[[FOUR]] : i32
|
|
// CHECK: %[[OFFSET:.+]] = spv.IMul %[[IDX]], %[[EIGHT]] : i32
|
|
// CHECK: %[[MASK1:.+]] = spv.Constant 255 : i32
|
|
// CHECK: %[[TMP1:.+]] = spv.ShiftLeftLogical %[[MASK1]], %[[OFFSET]] : i32, i32
|
|
// CHECK: %[[MASK:.+]] = spv.Not %[[TMP1]] : i32
|
|
// CHECK: %[[CLAMPED_VAL:.+]] = spv.BitwiseAnd %[[ARG1_CAST]], %[[MASK1]] : i32
|
|
// CHECK: %[[STORE_VAL:.+]] = spv.ShiftLeftLogical %[[CLAMPED_VAL]], %[[OFFSET]] : i32, i32
|
|
// CHECK: %[[FOUR2:.+]] = spv.Constant 4 : i32
|
|
// CHECK: %[[ACCESS_IDX:.+]] = spv.SDiv %[[ZERO]], %[[FOUR2]] : i32
|
|
// CHECK: %[[PTR:.+]] = spv.AccessChain %[[ARG0_CAST]][%[[ZERO]], %[[ACCESS_IDX]]]
|
|
// CHECK: spv.AtomicAnd "Device" "AcquireRelease" %[[PTR]], %[[MASK]]
|
|
// CHECK: spv.AtomicOr "Device" "AcquireRelease" %[[PTR]], %[[STORE_VAL]]
|
|
memref.store %value, %arg0[] : memref<i8>
|
|
return
|
|
}
|
|
|
|
// CHECK-LABEL: @store_i16
|
|
func @store_i16(%arg0: memref<10xi16>, %index: index, %value: i16) {
|
|
// CHECK: spv.Store
|
|
// CHECK-NOT: spv.AtomicAnd
|
|
// CHECK-NOT: spv.AtomicOr
|
|
memref.store %value, %arg0[%index] : memref<10xi16>
|
|
return
|
|
}
|
|
|
|
} // end module
|