forked from OSchip/llvm-project
141 lines
4.5 KiB
C
141 lines
4.5 KiB
C
// RUN: %clang_cc1 %s -O3 -triple=x86_64-unknown-unknown -target-feature +tbm -emit-llvm -o - | FileCheck %s
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// FIXME: The code generation checks for add/sub and/or are depending on the optimizer.
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// The REQUIRES keyword will be removed when the FIXME is complete.
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// REQUIRES: x86-registered-target
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// Don't include mm_malloc.h, it's system specific.
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#define __MM_MALLOC_H
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#include <x86intrin.h>
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unsigned int test__bextri_u32(unsigned int a) {
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// CHECK: call i32 @llvm.x86.tbm.bextri.u32
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return __bextri_u32(a, 1);
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}
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unsigned long long test__bextri_u64(unsigned long long a) {
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// CHECK: call i64 @llvm.x86.tbm.bextri.u64
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return __bextri_u64(a, 2);
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}
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unsigned long long test__bextri_u64_bigint(unsigned long long a) {
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// CHECK: call i64 @llvm.x86.tbm.bextri.u64
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return __bextri_u64(a, 0x7fffffffffLL);
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}
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unsigned int test__blcfill_u32(unsigned int a) {
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// CHECK: [[TMP:%.*]] = add i32 [[SRC:%.*]], 1
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// CHECK-NEXT: %{{.*}} = and i32 [[TMP]], [[SRC]]
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return __blcfill_u32(a);
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}
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unsigned long long test__blcfill_u64(unsigned long long a) {
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// CHECK: [[TMPT:%.*]] = add i64 [[SRC:%.*]], 1
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// CHECK-NEXT: %{{.*}} = and i64 [[TMP]], [[SRC]]
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return __blcfill_u64(a);
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}
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unsigned int test__blci_u32(unsigned int a) {
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// CHECK: [[TMP:%.*]] = sub i32 -2, [[SRC:%.*]]
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// CHECK-NEXT: %{{.*}} = or i32 [[TMP]], [[SRC]]
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return __blci_u32(a);
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}
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unsigned long long test__blci_u64(unsigned long long a) {
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// CHECK: [[TMP:%.*]] = sub i64 -2, [[SRC:%.*]]
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// CHECK-NEXT: %{{.*}} = or i64 [[TMP]], [[SRC]]
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return __blci_u64(a);
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}
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unsigned int test__blcic_u32(unsigned int a) {
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// CHECK: [[TMP1:%.*]] = xor i32 [[SRC:%.*]], -1
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// CHECK-NEXT: [[TMP2:%.*]] = add i32 [[SRC]], 1
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// CHECK-NEXT: {{.*}} = and i32 [[TMP2]], [[TMP1]]
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return __blcic_u32(a);
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}
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unsigned long long test__blcic_u64(unsigned long long a) {
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// CHECK: [[TMP1:%.*]] = xor i64 [[SRC:%.*]], -1
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// CHECK-NEXT: [[TMP2:%.*]] = add i64 [[SRC]], 1
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// CHECK-NEXT: {{.*}} = and i64 [[TMP2]], [[TMP1]]
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return __blcic_u64(a);
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}
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unsigned int test__blcmsk_u32(unsigned int a) {
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// CHECK: [[TMP:%.*]] = add i32 [[SRC:%.*]], 1
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// CHECK-NEXT: {{.*}} = xor i32 [[TMP]], [[SRC]]
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return __blcmsk_u32(a);
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}
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unsigned long long test__blcmsk_u64(unsigned long long a) {
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// CHECK: [[TMP:%.*]] = add i64 [[SRC:%.*]], 1
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// CHECK-NEXT: {{.*}} = xor i64 [[TMP]], [[SRC]]
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return __blcmsk_u64(a);
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}
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unsigned int test__blcs_u32(unsigned int a) {
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// CHECK: [[TMP:%.*]] = add i32 [[SRC:%.*]], 1
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// CHECK-NEXT: {{.*}} = or i32 [[TMP]], [[SRC]]
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return __blcs_u32(a);
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}
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unsigned long long test__blcs_u64(unsigned long long a) {
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// CHECK: [[TMP:%.*]] = add i64 [[SRC:%.*]], 1
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// CHECK-NEXT: {{.*}} = or i64 [[TMP]], [[SRC]]
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return __blcs_u64(a);
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}
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unsigned int test__blsfill_u32(unsigned int a) {
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// CHECK: [[TMP:%.*]] = add i32 [[SRC:%.*]], -1
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// CHECK-NEXT: {{.*}} = or i32 [[TMP]], [[SRC]]
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return __blsfill_u32(a);
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}
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unsigned long long test__blsfill_u64(unsigned long long a) {
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// CHECK: [[TMP:%.*]] = add i64 [[SRC:%.*]], -1
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// CHECK-NEXT: {{.*}} = or i64 [[TMP]], [[SRC]]
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return __blsfill_u64(a);
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}
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unsigned int test__blsic_u32(unsigned int a) {
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// CHECK: [[TMP1:%.*]] = xor i32 [[SRC:%.*]], -1
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// CHECK-NEXT: [[TMP2:%.*]] = add i32 [[SRC:%.*]], -1
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// CHECK-NEXT: {{.*}} = or i32 [[TMP2]], [[TMP1]]
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return __blsic_u32(a);
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}
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unsigned long long test__blsic_u64(unsigned long long a) {
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// CHECK: [[TMP1:%.*]] = xor i64 [[SRC:%.*]], -1
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// CHECK-NEXT: [[TMP2:%.*]] = add i64 [[SRC:%.*]], -1
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// CHECK-NEXT: {{.*}} = or i64 [[TMP2]], [[TMP1]]
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return __blsic_u64(a);
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}
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unsigned int test__t1mskc_u32(unsigned int a) {
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// CHECK: [[TMP1:%.*]] = xor i32 [[SRC:%.*]], -1
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// CHECK-NEXT: [[TMP2:%.*]] = add i32 [[SRC:%.*]], 1
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// CHECK-NEXT: {{.*}} = or i32 [[TMP2]], [[TMP1]]
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return __t1mskc_u32(a);
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}
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unsigned long long test__t1mskc_u64(unsigned long long a) {
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// CHECK: [[TMP1:%.*]] = xor i64 [[SRC:%.*]], -1
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// CHECK-NEXT: [[TMP2:%.*]] = add i64 [[SRC:%.*]], 1
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// CHECK-NEXT: {{.*}} = or i64 [[TMP2]], [[TMP1]]
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return __t1mskc_u64(a);
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}
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unsigned int test__tzmsk_u32(unsigned int a) {
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// CHECK: [[TMP1:%.*]] = xor i32 [[SRC:%.*]], -1
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// CHECK-NEXT: [[TMP2:%.*]] = add i32 [[SRC:%.*]], -1
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// CHECK-NEXT: {{.*}} = and i32 [[TMP2]], [[TMP1]]
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return __tzmsk_u32(a);
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}
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unsigned long long test__tzmsk_u64(unsigned long long a) {
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// CHECK: [[TMP1:%.*]] = xor i64 [[SRC:%.*]], -1
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// CHECK-NEXT: [[TMP2:%.*]] = add i64 [[SRC:%.*]], -1
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// CHECK-NEXT: {{.*}} = and i64 [[TMP2]], [[TMP1]]
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return __tzmsk_u64(a);
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}
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