llvm-project/llvm/test/tools/llvm-mca
Craig Topper d10a200ceb [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing.
We require d/q suffixes on the memory form of these instructions to disambiguate the memory size.
We don't require it on the register forms, but need to support parsing both with and without it.

Previously we always printed the d/q suffix on the register forms, but it's redundant and
inconsistent with gcc and objdump.

After this patch we should support the d/q for parsing, but not print it when its unneeded.

llvm-svn: 360085
2019-05-06 21:39:51 +00:00
..
AArch64 [llvm-mca][scheduler-stats] Print issued micro opcodes per cycle. NFCI 2019-04-08 16:05:54 +00:00
ARM [llvm-mca] Add support for instructions with a variadic number of operands. 2018-11-25 12:46:24 +00:00
SystemZ [MCA] Add support for BeginGroup/EndGroup. 2018-12-17 14:27:33 +00:00
X86 [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing. 2019-05-06 21:39:51 +00:00
invalid_input_file_name.test Replace unused output filenames with /dev/null in tests 2018-07-02 18:16:44 +00:00
lit.local.cfg