forked from OSchip/llvm-project
52 lines
1.3 KiB
LLVM
52 lines
1.3 KiB
LLVM
; RUN: llc < %s -mcpu=corei7 -march=x86 -mattr=+sse4.1 | FileCheck %s
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define void @t1(float* %R, <4 x float>* %P1) nounwind {
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; CHECK-LABEL: @t1
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; CHECK: movl 4(%esp), %[[R0:e[abcd]x]]
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; CHECK-NEXT: movl 8(%esp), %[[R1:e[abcd]x]]
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; CHECK-NEXT: movss 12(%[[R1]]), %[[R2:xmm.*]]
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; CHECK-NEXT: movss %[[R2]], (%[[R0]])
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; CHECK-NEXT: retl
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%X = load <4 x float>* %P1
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%tmp = extractelement <4 x float> %X, i32 3
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store float %tmp, float* %R
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ret void
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}
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define float @t2(<4 x float>* %P1) nounwind {
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; CHECK-LABEL: @t2
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; CHECK: movl 4(%esp), %[[R0:e[abcd]x]]
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; CHECK-NEXT: flds 8(%[[R0]])
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; CHECK-NEXT: retl
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%X = load <4 x float>* %P1
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%tmp = extractelement <4 x float> %X, i32 2
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ret float %tmp
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}
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define void @t3(i32* %R, <4 x i32>* %P1) nounwind {
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; CHECK-LABEL: @t3
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; CHECK: movl 4(%esp), %[[R0:e[abcd]x]]
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; CHECK-NEXT: movl 8(%esp), %[[R1:e[abcd]x]]
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; CHECK-NEXT: movl 12(%[[R1]]), %[[R2:e[abcd]x]]
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; CHECK-NEXT: movl %[[R2]], (%[[R0]])
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; CHECK-NEXT: retl
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%X = load <4 x i32>* %P1
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%tmp = extractelement <4 x i32> %X, i32 3
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store i32 %tmp, i32* %R
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ret void
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}
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define i32 @t4(<4 x i32>* %P1) nounwind {
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; CHECK-LABEL: @t4
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; CHECK: movl 4(%esp), %[[R0:e[abcd]x]]
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; CHECK-NEXT: movl 12(%[[R0]]), %eax
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; CHECK-NEXT: retl
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%X = load <4 x i32>* %P1
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%tmp = extractelement <4 x i32> %X, i32 3
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ret i32 %tmp
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}
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