forked from OSchip/llvm-project
32 lines
1.4 KiB
LLVM
32 lines
1.4 KiB
LLVM
; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=GFX8 -check-prefix=NOAUTO %s
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; RUN: llc -march=amdgcn -mattr=+auto-waitcnt-before-barrier -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=GFX8 -check-prefix=AUTO %s
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; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=GFX9 -check-prefix=NOAUTO %s
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; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=+auto-waitcnt-before-barrier -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=GFX9 -check-prefix=AUTO %s
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; GCN-LABEL: {{^}}test_barrier:
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; GFX8: buffer_store_dword
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; GFX9: flat_store_dword
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; NOAUTO: s_waitcnt
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; AUTO-NOT: s_waitcnt
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; GCN: s_barrier
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define amdgpu_kernel void @test_barrier(i32 addrspace(1)* %out, i32 %size) #0 {
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entry:
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%tmp = call i32 @llvm.amdgcn.workitem.id.x()
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%tmp1 = getelementptr i32, i32 addrspace(1)* %out, i32 %tmp
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store i32 %tmp, i32 addrspace(1)* %tmp1
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call void @llvm.amdgcn.s.barrier()
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%tmp3 = sub i32 %size, 1
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%tmp4 = sub i32 %tmp3, %tmp
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%tmp5 = getelementptr i32, i32 addrspace(1)* %out, i32 %tmp4
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%tmp6 = load i32, i32 addrspace(1)* %tmp5
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store i32 %tmp6, i32 addrspace(1)* %tmp1
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ret void
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}
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declare void @llvm.amdgcn.s.barrier() #1
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declare i32 @llvm.amdgcn.workitem.id.x() #2
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attributes #0 = { nounwind }
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attributes #1 = { convergent nounwind }
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attributes #2 = { nounwind readnone }
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