forked from OSchip/llvm-project
118 lines
3.1 KiB
C++
118 lines
3.1 KiB
C++
//===- X86LegalizerInfo.cpp --------------------------------------*- C++ -*-==//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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/// \file
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/// This file implements the targeting of the Machinelegalizer class for X86.
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/// \todo This should be generated by TableGen.
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//===----------------------------------------------------------------------===//
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#include "X86LegalizerInfo.h"
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#include "X86Subtarget.h"
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#include "llvm/CodeGen/ValueTypes.h"
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#include "llvm/IR/DerivedTypes.h"
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#include "llvm/IR/Type.h"
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#include "llvm/Target/TargetOpcodes.h"
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using namespace llvm;
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using namespace TargetOpcode;
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#ifndef LLVM_BUILD_GLOBAL_ISEL
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#error "You shouldn't build this"
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#endif
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X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI) : Subtarget(STI) {
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setLegalizerInfo32bit();
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setLegalizerInfo64bit();
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setLegalizerInfoSSE1();
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setLegalizerInfoSSE2();
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computeTables();
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}
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void X86LegalizerInfo::setLegalizerInfo32bit() {
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if (Subtarget.is64Bit())
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return;
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const LLT p0 = LLT::pointer(0, 32);
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const LLT s8 = LLT::scalar(8);
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const LLT s16 = LLT::scalar(16);
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const LLT s32 = LLT::scalar(32);
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for (unsigned BinOp : {G_ADD, G_SUB})
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for (auto Ty : {s8, s16, s32})
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setAction({BinOp, Ty}, Legal);
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for (unsigned MemOp : {G_LOAD, G_STORE}) {
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for (auto Ty : {s8, s16, s32, p0})
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setAction({MemOp, Ty}, Legal);
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// And everything's fine in addrspace 0.
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setAction({MemOp, 1, p0}, Legal);
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}
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}
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void X86LegalizerInfo::setLegalizerInfo64bit() {
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if (!Subtarget.is64Bit())
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return;
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const LLT p0 = LLT::pointer(0, 64);
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const LLT s8 = LLT::scalar(8);
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const LLT s16 = LLT::scalar(16);
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const LLT s32 = LLT::scalar(32);
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const LLT s64 = LLT::scalar(64);
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for (unsigned BinOp : {G_ADD, G_SUB})
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for (auto Ty : {s8, s16, s32, s64})
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setAction({BinOp, Ty}, Legal);
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for (unsigned MemOp : {G_LOAD, G_STORE}) {
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for (auto Ty : {s8, s16, s32, s64, p0})
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setAction({MemOp, Ty}, Legal);
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// And everything's fine in addrspace 0.
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setAction({MemOp, 1, p0}, Legal);
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}
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}
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void X86LegalizerInfo::setLegalizerInfoSSE1() {
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if (!Subtarget.hasSSE1())
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return;
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const LLT s32 = LLT::scalar(32);
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const LLT v4s32 = LLT::vector(4, 32);
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const LLT v2s64 = LLT::vector(2, 64);
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for (unsigned BinOp : {G_FADD, G_FSUB, G_FMUL, G_FDIV})
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for (auto Ty : {s32, v4s32})
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setAction({BinOp, Ty}, Legal);
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for (unsigned MemOp : {G_LOAD, G_STORE})
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for (auto Ty : {v4s32, v2s64})
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setAction({MemOp, Ty}, Legal);
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}
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void X86LegalizerInfo::setLegalizerInfoSSE2() {
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if (!Subtarget.hasSSE2())
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return;
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const LLT s64 = LLT::scalar(64);
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const LLT v4s32 = LLT::vector(4, 32);
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const LLT v2s64 = LLT::vector(2, 64);
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for (unsigned BinOp : {G_FADD, G_FSUB, G_FMUL, G_FDIV})
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for (auto Ty : {s64, v2s64})
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setAction({BinOp, Ty}, Legal);
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for (unsigned BinOp : {G_ADD, G_SUB})
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for (auto Ty : {v4s32})
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setAction({BinOp, Ty}, Legal);
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}
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