forked from OSchip/llvm-project
218 lines
7.3 KiB
C++
218 lines
7.3 KiB
C++
//===-- llvm/lib/Target/X86/X86CallLowering.cpp - Call lowering -----------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// This file implements the lowering of LLVM calls to machine code calls for
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/// GlobalISel.
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///
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//===----------------------------------------------------------------------===//
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#include "X86CallLowering.h"
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#include "X86CallingConv.h"
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#include "X86ISelLowering.h"
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#include "X86InstrInfo.h"
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#include "X86TargetMachine.h"
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#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/MachineValueType.h"
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#include "llvm/Target/TargetSubtargetInfo.h"
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using namespace llvm;
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#include "X86GenCallingConv.inc"
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#ifndef LLVM_BUILD_GLOBAL_ISEL
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#error "This shouldn't be built without GISel"
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#endif
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X86CallLowering::X86CallLowering(const X86TargetLowering &TLI)
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: CallLowering(&TLI) {}
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void X86CallLowering::splitToValueTypes(const ArgInfo &OrigArg,
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SmallVectorImpl<ArgInfo> &SplitArgs,
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const DataLayout &DL,
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MachineRegisterInfo &MRI,
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SplitArgTy PerformArgSplit) const {
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const X86TargetLowering &TLI = *getTLI<X86TargetLowering>();
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LLVMContext &Context = OrigArg.Ty->getContext();
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EVT VT = TLI.getValueType(DL, OrigArg.Ty);
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unsigned NumParts = TLI.getNumRegisters(Context, VT);
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if (NumParts == 1) {
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// replace the original type ( pointer -> GPR ).
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SplitArgs.emplace_back(OrigArg.Reg, VT.getTypeForEVT(Context),
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OrigArg.Flags, OrigArg.IsFixed);
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return;
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}
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SmallVector<uint64_t, 4> BitOffsets;
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SmallVector<unsigned, 8> SplitRegs;
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EVT PartVT = TLI.getRegisterType(Context, VT);
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Type *PartTy = PartVT.getTypeForEVT(Context);
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for (unsigned i = 0; i < NumParts; ++i) {
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ArgInfo Info =
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ArgInfo{MRI.createGenericVirtualRegister(getLLTForType(*PartTy, DL)),
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PartTy, OrigArg.Flags};
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SplitArgs.push_back(Info);
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PerformArgSplit(Info.Reg, PartVT.getSizeInBits() * i);
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}
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}
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namespace {
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struct FuncReturnHandler : public CallLowering::ValueHandler {
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FuncReturnHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI,
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MachineInstrBuilder &MIB, CCAssignFn *AssignFn)
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: ValueHandler(MIRBuilder, MRI, AssignFn), MIB(MIB) {}
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unsigned getStackAddress(uint64_t Size, int64_t Offset,
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MachinePointerInfo &MPO) override {
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llvm_unreachable("Don't know how to get a stack address yet");
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}
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void assignValueToReg(unsigned ValVReg, unsigned PhysReg,
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CCValAssign &VA) override {
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MIB.addUse(PhysReg, RegState::Implicit);
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unsigned ExtReg = extendRegister(ValVReg, VA);
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MIRBuilder.buildCopy(PhysReg, ExtReg);
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}
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void assignValueToAddress(unsigned ValVReg, unsigned Addr, uint64_t Size,
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MachinePointerInfo &MPO, CCValAssign &VA) override {
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llvm_unreachable("Don't know how to assign a value to an address yet");
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}
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MachineInstrBuilder &MIB;
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};
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} // End anonymous namespace.
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bool X86CallLowering::lowerReturn(MachineIRBuilder &MIRBuilder,
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const Value *Val, unsigned VReg) const {
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assert(((Val && VReg) || (!Val && !VReg)) && "Return value without a vreg");
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auto MIB = MIRBuilder.buildInstrNoInsert(X86::RET).addImm(0);
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if (VReg) {
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MachineFunction &MF = MIRBuilder.getMF();
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MachineRegisterInfo &MRI = MF.getRegInfo();
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auto &DL = MF.getDataLayout();
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const Function &F = *MF.getFunction();
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ArgInfo OrigArg{VReg, Val->getType()};
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setArgFlags(OrigArg, AttributeList::ReturnIndex, DL, F);
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SmallVector<ArgInfo, 8> SplitArgs;
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splitToValueTypes(OrigArg, SplitArgs, DL, MRI,
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[&](unsigned Reg, uint64_t Offset) {
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MIRBuilder.buildExtract(Reg, VReg, Offset);
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});
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FuncReturnHandler Handler(MIRBuilder, MRI, MIB, RetCC_X86);
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if (!handleAssignments(MIRBuilder, SplitArgs, Handler))
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return false;
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}
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MIRBuilder.insertInstr(MIB);
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return true;
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}
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namespace {
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struct FormalArgHandler : public CallLowering::ValueHandler {
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FormalArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI,
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CCAssignFn *AssignFn, const DataLayout &DL)
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: ValueHandler(MIRBuilder, MRI, AssignFn), DL(DL) {}
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unsigned getStackAddress(uint64_t Size, int64_t Offset,
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MachinePointerInfo &MPO) override {
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auto &MFI = MIRBuilder.getMF().getFrameInfo();
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int FI = MFI.CreateFixedObject(Size, Offset, true);
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MPO = MachinePointerInfo::getFixedStack(MIRBuilder.getMF(), FI);
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unsigned AddrReg = MRI.createGenericVirtualRegister(
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LLT::pointer(0, DL.getPointerSizeInBits(0)));
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MIRBuilder.buildFrameIndex(AddrReg, FI);
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return AddrReg;
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}
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void assignValueToAddress(unsigned ValVReg, unsigned Addr, uint64_t Size,
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MachinePointerInfo &MPO, CCValAssign &VA) override {
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auto MMO = MIRBuilder.getMF().getMachineMemOperand(
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MPO, MachineMemOperand::MOLoad | MachineMemOperand::MOInvariant, Size,
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0);
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MIRBuilder.buildLoad(ValVReg, Addr, *MMO);
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}
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void assignValueToReg(unsigned ValVReg, unsigned PhysReg,
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CCValAssign &VA) override {
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MIRBuilder.getMBB().addLiveIn(PhysReg);
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MIRBuilder.buildCopy(ValVReg, PhysReg);
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}
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const DataLayout &DL;
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};
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} // namespace
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bool X86CallLowering::lowerFormalArguments(MachineIRBuilder &MIRBuilder,
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const Function &F,
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ArrayRef<unsigned> VRegs) const {
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if (F.arg_empty())
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return true;
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// TODO: handle variadic function
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if (F.isVarArg())
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return false;
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MachineFunction &MF = MIRBuilder.getMF();
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MachineRegisterInfo &MRI = MF.getRegInfo();
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auto DL = MF.getDataLayout();
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SmallVector<ArgInfo, 8> SplitArgs;
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unsigned Idx = 0;
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for (auto &Arg : F.args()) {
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ArgInfo OrigArg(VRegs[Idx], Arg.getType());
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setArgFlags(OrigArg, Idx + 1, DL, F);
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LLT Ty = MRI.getType(VRegs[Idx]);
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unsigned Dst = VRegs[Idx];
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bool Split = false;
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splitToValueTypes(OrigArg, SplitArgs, DL, MRI,
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[&](unsigned Reg, uint64_t Offset) {
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if (!Split) {
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Split = true;
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Dst = MRI.createGenericVirtualRegister(Ty);
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MIRBuilder.buildUndef(Dst);
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}
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unsigned Tmp = MRI.createGenericVirtualRegister(Ty);
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MIRBuilder.buildInsert(Tmp, Dst, Reg, Offset);
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Dst = Tmp;
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});
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if (Dst != VRegs[Idx])
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MIRBuilder.buildCopy(VRegs[Idx], Dst);
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Idx++;
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}
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MachineBasicBlock &MBB = MIRBuilder.getMBB();
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if (!MBB.empty())
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MIRBuilder.setInstr(*MBB.begin());
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FormalArgHandler Handler(MIRBuilder, MRI, CC_X86, DL);
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if (!handleAssignments(MIRBuilder, SplitArgs, Handler))
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return false;
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// Move back to the end of the basic block.
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MIRBuilder.setMBB(MBB);
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return true;
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}
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