forked from OSchip/llvm-project
121 lines
4.9 KiB
LLVM
121 lines
4.9 KiB
LLVM
; RUN: opt < %s -loop-vectorize -S | \
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; RUN: FileCheck %s -check-prefixes=COMMON,CHECK
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; RUN: opt < %s -loop-vectorize -prefer-predicate-over-epilog -S | \
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; RUN: FileCheck -check-prefixes=COMMON,PREDFLAG %s
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target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
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target triple = "thumbv8.1m.main-arm-unknown-eabihf"
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define dso_local void @tail_folding(i32* noalias nocapture %A, i32* noalias nocapture readonly %B, i32* noalias nocapture readonly %C) #0 {
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; CHECK-LABEL: tail_folding(
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; CHECK: vector.body:
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;
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; This needs implementation of TTI::preferPredicateOverEpilogue,
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; then this will be tail-folded too:
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;
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; CHECK-NOT: call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(
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; CHECK-NOT: call void @llvm.masked.store.v4i32.p0v4i32(
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; CHECK: br i1 %{{.*}}, label %{{.*}}, label %vector.body
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entry:
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br label %for.body
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for.cond.cleanup:
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ret void
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for.body:
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%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
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%arrayidx = getelementptr inbounds i32, i32* %B, i64 %indvars.iv
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%0 = load i32, i32* %arrayidx, align 4
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%arrayidx2 = getelementptr inbounds i32, i32* %C, i64 %indvars.iv
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%1 = load i32, i32* %arrayidx2, align 4
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%add = add nsw i32 %1, %0
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%arrayidx4 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
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store i32 %add, i32* %arrayidx4, align 4
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, 430
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br i1 %exitcond, label %for.cond.cleanup, label %for.body
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}
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define dso_local void @tail_folding_enabled(i32* noalias nocapture %A, i32* noalias nocapture readonly %B, i32* noalias nocapture readonly %C) local_unnamed_addr #0 {
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; COMMON-LABEL: tail_folding_enabled(
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; COMMON: vector.body:
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; COMMON: %[[WML1:.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(
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; COMMON: %[[WML2:.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(
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; COMMON: %[[ADD:.*]] = add nsw <4 x i32> %[[WML2]], %[[WML1]]
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; COMMON: call void @llvm.masked.store.v4i32.p0v4i32(<4 x i32> %[[ADD]]
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; COMMON: br i1 %12, label %{{.*}}, label %vector.body
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entry:
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br label %for.body
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for.cond.cleanup:
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ret void
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for.body:
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%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
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%arrayidx = getelementptr inbounds i32, i32* %B, i64 %indvars.iv
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%0 = load i32, i32* %arrayidx, align 4
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%arrayidx2 = getelementptr inbounds i32, i32* %C, i64 %indvars.iv
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%1 = load i32, i32* %arrayidx2, align 4
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%add = add nsw i32 %1, %0
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%arrayidx4 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
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store i32 %add, i32* %arrayidx4, align 4
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, 430
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br i1 %exitcond, label %for.cond.cleanup, label %for.body, !llvm.loop !6
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}
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define dso_local void @tail_folding_disabled(i32* noalias nocapture %A, i32* noalias nocapture readonly %B, i32* noalias nocapture readonly %C) local_unnamed_addr #0 {
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; CHECK-LABEL: tail_folding_disabled(
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; CHECK: vector.body:
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; CHECK-NOT: @llvm.masked.load.v8i32.p0v8i32(
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; CHECK-NOT: @llvm.masked.store.v8i32.p0v8i32(
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; CHECK: br i1 %{{.*}}, label {{.*}}, label %vector.body
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; PREDFLAG-LABEL: tail_folding_disabled(
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; PREDFLAG: vector.body:
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; PREDFLAG: %wide.masked.load = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(
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; PREDFLAG: %wide.masked.load1 = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(
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; PREDFLAG: %{{.*}} = add nsw <4 x i32> %wide.masked.load1, %wide.masked.load
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; PREDFLAG: call void @llvm.masked.store.v4i32.p0v4i32(
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; PREDFLAG: %index.next = add i64 %index, 4
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; PREDFLAG: %12 = icmp eq i64 %index.next, 432
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; PREDFLAG: br i1 %{{.*}}, label %middle.block, label %vector.body, !llvm.loop !6
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entry:
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br label %for.body
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for.cond.cleanup:
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ret void
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for.body:
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%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
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%arrayidx = getelementptr inbounds i32, i32* %B, i64 %indvars.iv
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%0 = load i32, i32* %arrayidx, align 4
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%arrayidx2 = getelementptr inbounds i32, i32* %C, i64 %indvars.iv
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%1 = load i32, i32* %arrayidx2, align 4
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%add = add nsw i32 %1, %0
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%arrayidx4 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
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store i32 %add, i32* %arrayidx4, align 4
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, 430
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br i1 %exitcond, label %for.cond.cleanup, label %for.body, !llvm.loop !10
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}
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; CHECK: !0 = distinct !{!0, !1}
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; CHECK-NEXT: !1 = !{!"llvm.loop.isvectorized", i32 1}
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; CHECK-NEXT: !2 = distinct !{!2, !3, !1}
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; CHECK-NEXT: !3 = !{!"llvm.loop.unroll.runtime.disable"}
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; CHECK-NEXT: !4 = distinct !{!4, !1}
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; CHECK-NEXT: !5 = distinct !{!5, !3, !1}
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; CHECK-NEXT: !6 = distinct !{!6, !1}
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attributes #0 = { nofree norecurse nounwind "target-features"="+armv8.1-m.main,+mve.fp" }
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!6 = distinct !{!6, !7, !8}
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!7 = !{!"llvm.loop.vectorize.predicate.enable", i1 true}
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!8 = !{!"llvm.loop.vectorize.enable", i1 true}
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!10 = distinct !{!10, !11, !12}
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!11 = !{!"llvm.loop.vectorize.predicate.enable", i1 false}
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!12 = !{!"llvm.loop.vectorize.enable", i1 true}
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