forked from OSchip/llvm-project
93 lines
2.6 KiB
LLVM
93 lines
2.6 KiB
LLVM
; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr -mcpu=generic < %s -mtriple=ppc64-- | FileCheck %s -check-prefix=GENERIC-CHECK
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; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr -mcpu=pwr8 < %s -mtriple=ppc64-- | FileCheck %s -check-prefixes=PWR8-CHECK,CHECK
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; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr -mcpu=pwr9 < %s -mtriple=ppc64le-- | FileCheck %s -check-prefixes=PWR9-CHECK,CHECK
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define i64 @foo(i64 %a) {
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entry:
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%mul = mul nsw i64 %a, 6
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ret i64 %mul
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}
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; GENERIC-CHECK-LABEL: @foo
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; GENERIC-CHECK: mulli r3, r3, 6
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; GENERIC-CHECK: blr
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define i64 @test1(i64 %a) {
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%tmp.1 = mul nsw i64 %a, 16 ; <i64> [#uses=1]
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ret i64 %tmp.1
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}
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; CHECK-LABEL: test1:
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; CHECK-NOT: mul
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; CHECK: sldi r[[REG1:[0-9]+]], r3, 4
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define i64 @test2(i64 %a) {
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%tmp.1 = mul nsw i64 %a, 17 ; <i64> [#uses=1]
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ret i64 %tmp.1
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}
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; CHECK-LABEL: test2:
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; CHECK-NOT: mul
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; CHECK: sldi r[[REG1:[0-9]+]], r3, 4
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; CHECK-NEXT: add r[[REG2:[0-9]+]], r3, r[[REG1]]
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define i64 @test3(i64 %a) {
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%tmp.1 = mul nsw i64 %a, 15 ; <i64> [#uses=1]
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ret i64 %tmp.1
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}
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; CHECK-LABEL: test3:
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; CHECK-NOT: mul
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; CHECK: sldi r[[REG1:[0-9]+]], r3, 4
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; CHECK-NEXT: sub r[[REG2:[0-9]+]], r[[REG1]], r3
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; negtive constant
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define i64 @test4(i64 %a) {
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%tmp.1 = mul nsw i64 %a, -16 ; <i64> [#uses=1]
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ret i64 %tmp.1
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}
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; CHECK-LABEL: test4:
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; CHECK-NOT: mul
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; CHECK: sldi r[[REG1:[0-9]+]], r3, 4
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; CHECK-NEXT: neg r[[REG2:[0-9]+]], r[[REG1]]
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define i64 @test5(i64 %a) {
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%tmp.1 = mul nsw i64 %a, -17 ; <i64> [#uses=1]
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ret i64 %tmp.1
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}
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; CHECK-LABEL: test5:
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; PWR9-CHECK: mulli r[[REG1:[0-9]+]], r3, -17
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; PWR8-CHECK-NOT: mul
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; PWR8-CHECK: sldi r[[REG1:[0-9]+]], r3, 4
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; PWR8-CHECK-NEXT: add r[[REG2:[0-9]+]], r3, r[[REG1]]
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; PWR8-CHECK-NEXT: neg r{{[0-9]+}}, r[[REG2]]
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define i64 @test6(i64 %a) {
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%tmp.1 = mul nsw i64 %a, -15 ; <i64> [#uses=1]
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ret i64 %tmp.1
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}
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; CHECK-LABEL: test6:
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; CHECK-NOT: mul
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; CHECK: sldi r[[REG1:[0-9]+]], r3, 4
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; CHECK-NEXT: sub r[[REG2:[0-9]+]], r3, r[[REG1]]
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; CHECK-NOT: neg
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; boundary case
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define i64 @test7(i64 %a) {
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%tmp.1 = mul nsw i64 %a, -9223372036854775808 ; <i64> [#uses=1]
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ret i64 %tmp.1
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}
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; CHECK-LABEL: test7:
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; CHECK-NOT: mul
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; CHECK: sldi r[[REG1:[0-9]+]], r3, 63
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define i64 @test8(i64 %a) {
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%tmp.1 = mul nsw i64 %a, 9223372036854775807 ; <i64> [#uses=1]
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ret i64 %tmp.1
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}
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; CHECK-LABEL: test8:
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; CHECK-NOT: mul
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; CHECK: sldi r[[REG1:[0-9]+]], r3, 63
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; CHECK-NEXT: sub r[[REG2:[0-9]+]], r[[REG1]], r3
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