forked from OSchip/llvm-project
24 lines
1006 B
LLVM
24 lines
1006 B
LLVM
; REQUIRES: asserts
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; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a57 -enable-misched=0 -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck %s
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@G1 = common global [100 x i32] zeroinitializer, align 4
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@G2 = common global [100 x i32] zeroinitializer, align 4
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; Check that no scheduling dependencies are created between the paired loads and the store during post-RA MI scheduling.
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;
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; CHECK-LABEL: # Machine code for function foo:
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; CHECK: SU(2): renamable $w{{[0-9]+}}, renamable $w{{[0-9]+}} = LDPWi
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; CHECK: Successors:
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; CHECK-NOT: ch SU(4)
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; CHECK: SU(3)
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; CHECK: SU(4): STRWui $wzr, renamable $x{{[0-9]+}}
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define i32 @foo() {
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entry:
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%0 = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @G2, i64 0, i64 0), align 4
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%1 = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @G2, i64 0, i64 1), align 4
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store i32 0, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @G1, i64 0, i64 0), align 4
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%add = add nsw i32 %1, %0
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ret i32 %add
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}
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