.. |
AsmParser
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AMDGPU/SI: Emit constant arrays in the .hsrodata_readonly_agent section
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2015-12-03 03:34:32 +00:00 |
InstPrinter
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AMDGPU: Fix parsing of 32-bit literals with sign bit set
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2015-10-23 18:07:58 +00:00 |
MCTargetDesc
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AMDGPU/SI: Fix warning introduced by r255204
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2015-12-10 03:10:46 +00:00 |
TargetInfo
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Utils
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AMDGPU/SI: Add getShaderType() function to Utils/
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2015-12-15 16:26:16 +00:00 |
AMDGPU.h
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AMDGPU/SI: Select constant loads with non-uniform addresses to MUBUF instructions
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2015-12-15 20:55:55 +00:00 |
AMDGPU.td
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AMDPGU/SI: Use AssertZext node to mask high bit for scratch offsets
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2015-07-16 19:40:07 +00:00 |
AMDGPUAlwaysInlinePass.cpp
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AMDGPU: Minor cleanups to always inline pass
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2015-07-13 19:08:36 +00:00 |
AMDGPUAnnotateKernelFeatures.cpp
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AMDGPU: Add llvm.amdgcn.dispatch.ptr intrinsic
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2015-11-26 00:43:29 +00:00 |
AMDGPUAnnotateUniformValues.cpp
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AMDGPU/SI: Select constant loads with non-uniform addresses to MUBUF instructions
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2015-12-15 20:55:55 +00:00 |
AMDGPUAsmPrinter.cpp
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AMDGPU/SI: Set the code object work group segment size when targeting HSA
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2015-12-15 23:15:25 +00:00 |
AMDGPUAsmPrinter.h
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AMDGPU/SI: Emit constant arrays in the .text section
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2015-12-10 02:13:01 +00:00 |
AMDGPUCallingConv.td
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AMDGPUDiagnosticInfoUnsupported.cpp
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AMDGPU: Split DiagnosticInfoUnsupported into its own file
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2015-10-21 22:37:46 +00:00 |
AMDGPUDiagnosticInfoUnsupported.h
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AMDGPU: Split DiagnosticInfoUnsupported into its own file
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2015-10-21 22:37:46 +00:00 |
AMDGPUFrameLowering.cpp
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Remove redundant TargetFrameLowering::getFrameIndexOffset virtual
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2015-08-15 02:32:35 +00:00 |
AMDGPUFrameLowering.h
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AMDGPU: Create emergency stack slots during frame lowering
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2015-11-06 18:17:45 +00:00 |
AMDGPUISelDAGToDAG.cpp
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AMDGPU: Error on addrspacecasts that aren't actually implemented
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2015-12-01 23:04:05 +00:00 |
AMDGPUISelLowering.cpp
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AMDGPU: Use generic bitreverse intrinsic
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2015-12-14 17:25:38 +00:00 |
AMDGPUISelLowering.h
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AMDGPU: Use generic bitreverse intrinsic
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2015-12-14 17:25:38 +00:00 |
AMDGPUInstrInfo.cpp
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Make a bunch of static arrays const.
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2015-10-18 05:15:34 +00:00 |
AMDGPUInstrInfo.h
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AMDGPU: Make getNamedOperandIdx declaration readonly
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2015-09-25 18:09:15 +00:00 |
AMDGPUInstrInfo.td
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AMDGPU: Use generic bitreverse intrinsic
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2015-12-14 17:25:38 +00:00 |
AMDGPUInstructions.td
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Start replacing vector_extract/vector_insert with extractelt/insertelt
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2015-12-11 19:20:16 +00:00 |
AMDGPUIntrinsicInfo.cpp
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AMDGPUIntrinsicInfo.h
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AMDGPUIntrinsics.td
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AMDGPUMCInstLower.cpp
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AMDGPU/SI: Emit constant arrays in the .text section
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2015-12-10 02:13:01 +00:00 |
AMDGPUMCInstLower.h
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AMDGPUMachineFunction.cpp
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AMDGPU/SI: Add getShaderType() function to Utils/
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2015-12-15 16:26:16 +00:00 |
AMDGPUMachineFunction.h
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AMDGPU/SI: Emit HSA kernels with symbol type STT_AMDGPU_HSA_KERNEL
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2015-11-06 11:45:14 +00:00 |
AMDGPUOpenCLImageTypeLoweringPass.cpp
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AMDGPU/SI: Remove assert from AMDGPUOpenCLImageTypeLowering pass
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2015-10-01 21:16:05 +00:00 |
AMDGPUPromoteAlloca.cpp
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Revert "Change memcpy/memset/memmove to have dest and source alignments."
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2015-11-19 05:56:52 +00:00 |
AMDGPURegisterInfo.cpp
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AMDGPURegisterInfo.h
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AMDGPU: Remove dead code
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2015-09-19 06:41:10 +00:00 |
AMDGPURegisterInfo.td
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AMDGPU: Set SubRegIndex size and offset
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2015-07-30 17:03:11 +00:00 |
AMDGPUSubtarget.cpp
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AMDGPU: Cleanup includes
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2015-11-06 18:23:00 +00:00 |
AMDGPUSubtarget.h
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AMDGPU: Error if too many user SGPRs used
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2015-11-30 21:16:07 +00:00 |
AMDGPUTargetMachine.cpp
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AMDGPU/SI: Select constant loads with non-uniform addresses to MUBUF instructions
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2015-12-15 20:55:55 +00:00 |
AMDGPUTargetMachine.h
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AMDGPU/SI: Use .hsatext section instead of .text for HSA
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2015-09-25 21:41:28 +00:00 |
AMDGPUTargetObjectFile.cpp
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AMDGPU/SI: Emit constant variables in the .hsatext section when targeting HSA
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2015-12-15 22:39:36 +00:00 |
AMDGPUTargetObjectFile.h
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AMDGPU/SI: Emit constant arrays in the .text section
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2015-12-10 02:13:01 +00:00 |
AMDGPUTargetTransformInfo.cpp
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AMDGPU: Override getCFInstrCost
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2015-12-16 18:37:19 +00:00 |
AMDGPUTargetTransformInfo.h
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AMDGPU: Override getCFInstrCost
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2015-12-16 18:37:19 +00:00 |
AMDILCFGStructurizer.cpp
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Normalize MBB's successors' probabilities in several locations.
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2015-12-13 09:26:17 +00:00 |
AMDKernelCodeT.h
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AMDGPU/SI: Update amd_kernel_code_t definition and add assembler support
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2015-06-26 21:58:31 +00:00 |
CIInstructions.td
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AMDGPU: Add s_dcache_* instructions
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2015-09-24 19:52:27 +00:00 |
CMakeLists.txt
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AMDGPU/SI: Select constant loads with non-uniform addresses to MUBUF instructions
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2015-12-15 20:55:55 +00:00 |
CaymanInstructions.td
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AMDGPU: Add MEM_RAT STORE_TYPED.
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2015-10-01 17:51:34 +00:00 |
EvergreenInstructions.td
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AMDGPU: Add MEM_RAT STORE_TYPED.
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2015-10-01 17:51:34 +00:00 |
LLVMBuild.txt
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AMDGPU/SI: Add hsa code object directives
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2015-06-26 21:15:07 +00:00 |
Makefile
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AMDGPU/SI: Add hsa code object directives
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2015-06-26 21:15:07 +00:00 |
Processors.td
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AMDGPU: Add stony support
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2015-11-13 17:06:32 +00:00 |
R600ClauseMergePass.cpp
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R600ControlFlowFinalizer.cpp
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AMDGPU: Remove implicit ilist iterator conversions, NFC
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2015-10-13 20:07:10 +00:00 |
R600Defines.h
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Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)
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2015-06-23 09:49:53 +00:00 |
R600EmitClauseMarkers.cpp
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R600ExpandSpecialInstrs.cpp
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R600ISelLowering.cpp
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AMDGPU: Add MEM_RAT STORE_TYPED.
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2015-10-01 17:51:34 +00:00 |
R600ISelLowering.h
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Make TargetLowering::getPointerTy() taking DataLayout as an argument
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2015-07-09 02:09:04 +00:00 |
R600InstrFormats.td
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R600InstrInfo.cpp
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Pass BranchProbability/BlockMass by value instead of const& as they are small. NFC.
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2015-09-10 23:10:42 +00:00 |
R600InstrInfo.h
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Pass BranchProbability/BlockMass by value instead of const& as they are small. NFC.
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2015-09-10 23:10:42 +00:00 |
R600Instructions.td
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Fix typos.
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2015-09-12 01:17:08 +00:00 |
R600Intrinsics.td
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R600MachineFunctionInfo.cpp
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R600MachineFunctionInfo.h
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Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)
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2015-06-23 09:49:53 +00:00 |
R600MachineScheduler.cpp
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R600MachineScheduler.h
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R600OptimizeVectorRegisters.cpp
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AMDGPU: Remove implicit ilist iterator conversions, NFC
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2015-10-13 20:07:10 +00:00 |
R600Packetizer.cpp
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[Packetizer] Add AliasAnalysis as a parameter to the packetizer
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2015-12-14 20:35:13 +00:00 |
R600RegisterInfo.cpp
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R600RegisterInfo.h
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AMDGPU: Remove dead code
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2015-09-19 06:41:10 +00:00 |
R600RegisterInfo.td
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R600Schedule.td
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R600TextureIntrinsicsReplacer.cpp
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Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)
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2015-06-23 09:49:53 +00:00 |
R700Instructions.td
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SIAnnotateControlFlow.cpp
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AMDGPU: Remove implicit ilist iterator conversions, NFC
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2015-10-13 20:07:10 +00:00 |
SIDefines.h
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AMDGPU/SI: Add 64-bit versions of v_nop and v_clrexcp
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2015-10-06 15:57:53 +00:00 |
SIFixControlFlowLiveIntervals.cpp
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AMDGPU: Remove unused includes
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2015-09-25 00:28:43 +00:00 |
SIFixSGPRCopies.cpp
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AMDGPU: Initialize SIFixSGPRCopies so -print-after works
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2015-11-03 22:30:13 +00:00 |
SIFixSGPRLiveRanges.cpp
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AMDGPU: Remove implicit ilist iterator conversions, NFC
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2015-10-13 20:07:10 +00:00 |
SIFoldOperands.cpp
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AMDGPU: Fix verifier error in SIFoldOperands
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2015-10-21 22:37:50 +00:00 |
SIFrameLowering.cpp
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AMDGPU: Rework how private buffer passed for HSA
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2015-11-30 21:16:03 +00:00 |
SIFrameLowering.h
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AMDGPU: Remove SIPrepareScratchRegs
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2015-11-30 21:15:53 +00:00 |
SIISelLowering.cpp
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AMDGPU/SI: Select constant loads with non-uniform addresses to MUBUF instructions
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2015-12-15 20:55:55 +00:00 |
SIISelLowering.h
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AMDGPU/SI: Select constant loads with non-uniform addresses to MUBUF instructions
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2015-12-15 20:55:55 +00:00 |
SIInsertWaits.cpp
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AMDGPU: Add MachineInstr overloads for instruction format tests
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2015-10-20 04:35:43 +00:00 |
SIInstrFormats.td
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AMDGPU/SI: Add 64-bit versions of v_nop and v_clrexcp
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2015-10-06 15:57:53 +00:00 |
SIInstrInfo.cpp
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AMDGPU/SI: Emit constant arrays in the .text section
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2015-12-10 02:13:01 +00:00 |
SIInstrInfo.h
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AMDGPU: Optimize VOP2 operand legalization
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2015-12-01 19:57:17 +00:00 |
SIInstrInfo.td
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AMDGPU/SI: Select constant loads with non-uniform addresses to MUBUF instructions
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2015-12-15 20:55:55 +00:00 |
SIInstructions.td
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AMDGPU/SI: Select constant loads with non-uniform addresses to MUBUF instructions
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2015-12-15 20:55:55 +00:00 |
SIIntrinsics.td
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SILoadStoreOptimizer.cpp
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AMDGPU/SI: Fix read2 merging into a super register.
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2015-07-14 17:57:36 +00:00 |
SILowerControlFlow.cpp
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AMDGPU: Fix adding redundant m0 uses
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2015-10-21 22:37:51 +00:00 |
SILowerI1Copies.cpp
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AMDGPU: Fix recomputing dominator tree unnecessarily
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2015-09-25 17:21:28 +00:00 |
SIMachineFunctionInfo.cpp
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AMDGPU: Rework how private buffer passed for HSA
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2015-11-30 21:16:03 +00:00 |
SIMachineFunctionInfo.h
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AMDGPU: Rework how private buffer passed for HSA
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2015-11-30 21:16:03 +00:00 |
SIRegisterInfo.cpp
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Squelch unused variable warning in SIRegisterInfo.cpp.
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2015-12-01 02:14:33 +00:00 |
SIRegisterInfo.h
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AMDGPU: Optimize VOP2 operand legalization
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2015-12-01 19:57:17 +00:00 |
SIRegisterInfo.td
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AMDGPU: Make v2i64/v2f64 legal types.
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2015-11-25 19:58:34 +00:00 |
SISchedule.td
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AMDGPU: Improve accuracy of instruction rates for VOPC
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2015-09-25 16:58:25 +00:00 |
SIShrinkInstructions.cpp
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AMDGPU: Add MachineInstr overloads for instruction format tests
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2015-10-20 04:35:43 +00:00 |
SITypeRewriter.cpp
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AMDGPU/SI: Add getShaderType() function to Utils/
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2015-12-15 16:26:16 +00:00 |
VIInstrFormats.td
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VIInstructions.td
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AMDGPU: Fix typo
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2015-11-05 01:03:08 +00:00 |