llvm-project/llvm/test/CodeGen
Jessica Paquette 0154bd1385 [GlobalISel][AArch64] Add instruction selection support for @llvm.log2
This teaches GlobalISel to emit a RTLib call for @llvm.log2 when it encounters
it.

It updates the existing floating point tests to show that we don't fall back on
the intrinsic, and select the correct instructions. It also adds a legalizer
test for G_FLOG2.

https://reviews.llvm.org/D57357

llvm-svn: 352673
2019-01-30 21:16:04 +00:00
..
AArch64 [GlobalISel][AArch64] Add instruction selection support for @llvm.log2 2019-01-30 21:16:04 +00:00
AMDGPU Add a 'dynamic' parameter to the objectsize intrinsic 2019-01-30 20:34:35 +00:00
ARC
ARM [ARM] Use sub for negative offset load/store in thumb1 2019-01-29 10:40:31 +00:00
AVR [AVR] Insert unconditional branch when inserting MBBs between blocks with fallthrough 2019-01-21 04:32:02 +00:00
BPF [BPF] Fix .BTF.ext reloc type assigment issue 2019-01-08 16:36:06 +00:00
Generic [AVR] Remove unneeded XFAILs from the Generic CodeGen tests 2019-01-20 11:16:58 +00:00
Hexagon [Pipeliner] Add two pragmas to control software pipelining optimization 2019-01-23 03:26:10 +00:00
Inputs
Lanai [Targets] Add errors for tiny and kernel codemodel on targets that don't support them 2018-12-07 12:10:23 +00:00
MIR GlobalISel: Verify load/store has a pointer input 2019-01-27 15:57:23 +00:00
MSP430 [MSP430] Fix absolute addressing mode printing in AsmPrinter 2019-01-25 09:14:05 +00:00
Mips [mips] Support for +abs2008 attribute 2019-01-28 14:59:30 +00:00
NVPTX [NVPTX] Some nvvm.read.ptx.sreg intrinsics should have IntrInaccessibleMemOnly attribute. 2019-01-26 00:28:32 +00:00
PowerPC [PowerPC] more opportunity for converting reg+reg to reg+imm 2019-01-30 01:57:01 +00:00
RISCV [RISCV] Add target DAG combine for bitcast fabs/fneg on RV32FD 2019-01-25 21:55:48 +00:00
SPARC Replace "no-frame-pointer-*" function attributes with "frame-pointer" 2019-01-14 10:55:55 +00:00
SystemZ [CodeGenPrepare] Handle all debug calls in dupRetToEnableTailCallOpts() 2019-01-29 09:03:35 +00:00
Thumb [ARM] Combine ands+lsls to lsls+lsrs for Thumb1. 2019-01-22 01:51:37 +00:00
Thumb2 Revert r351938 "[ARM] Alter the register allocation order for minsize on Thumb2" 2019-01-23 21:10:48 +00:00
WebAssembly [WebAssembly] Exception handling: Switch to the new proposal 2019-01-30 03:21:57 +00:00
WinCFGuard
WinEH [EH] Rename llvm.x86.seh.recoverfp intrinsic to llvm.eh.recoverfp 2019-01-16 00:37:13 +00:00
X86 Add a 'dynamic' parameter to the objectsize intrinsic 2019-01-30 20:34:35 +00:00
XCore Replace "no-frame-pointer-*" function attributes with "frame-pointer" 2019-01-14 10:55:55 +00:00