forked from OSchip/llvm-project
29 lines
892 B
LLVM
29 lines
892 B
LLVM
; REQUIRES: asserts
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; RUN: llc < %s -mtriple=armv8r-eabi -mcpu=cortex-a57 -misched-postra -enable-misched -verify-misched -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck %s
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; CHECK: ********** MI Scheduling **********
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; We need second, post-ra scheduling to have LDM instruction combined from single-loads
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; CHECK: ********** MI Scheduling **********
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; CHECK: LDMIA
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; CHECK: rdefs left
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; CHECK-NEXT: Latency : 3
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; CHECK: Successors:
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; CHECK: Data
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; CHECK-SAME: Latency=3
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; CHECK-NEXT: Data
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; CHECK-SAME: Latency=0
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define i32 @foo(i32* %a) nounwind optsize {
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entry:
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%b = getelementptr i32, i32* %a, i32 1
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%c = getelementptr i32, i32* %a, i32 2
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%0 = load i32, i32* %a, align 4
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%1 = load i32, i32* %b, align 4
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%2 = load i32, i32* %c, align 4
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%mul1 = mul i32 %0, %1
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%mul2 = mul i32 %mul1, %2
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ret i32 %mul2
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}
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