forked from OSchip/llvm-project
96 lines
3.5 KiB
LLVM
96 lines
3.5 KiB
LLVM
; RUN: opt -mtriple=arm-arm-eabi -mcpu=cortex-m33 < %s -arm-parallel-dsp -S | FileCheck %s
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; CHECK-LABEL: @test1
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; CHECK: %mac1{{\.}}026 = phi i32 [ [[V8:%[0-9]+]], %for.body ], [ 0, %for.body.preheader ]
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; CHECK: [[V4:%[0-9]+]] = bitcast i16* %arrayidx to i32*
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; CHECK: [[V5:%[0-9]+]] = load i32, i32* [[V4]], align 2
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; CHECK: [[V6:%[0-9]+]] = bitcast i16* %arrayidx3 to i32*
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; CHECK: [[V7:%[0-9]+]] = load i32, i32* [[V6]], align 2
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; CHECK: [[V8]] = call i32 @llvm.arm.smlad(i32 [[V7]], i32 [[V5]], i32 %mac1{{\.}}026)
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define dso_local i32 @test1(i32 %arg, i32* nocapture readnone %arg1, i16* nocapture readonly %arg2, i16* nocapture readonly %arg3) {
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entry:
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%cmp24 = icmp sgt i32 %arg, 0
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br i1 %cmp24, label %for.body.preheader, label %for.cond.cleanup
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for.body.preheader:
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%.pre = load i16, i16* %arg3, align 2
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%.pre27 = load i16, i16* %arg2, align 2
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br label %for.body
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for.cond.cleanup:
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%mac1.0.lcssa = phi i32 [ 0, %entry ], [ %add11, %for.body ]
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ret i32 %mac1.0.lcssa
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for.body:
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%mac1.026 = phi i32 [ %add11, %for.body ], [ 0, %for.body.preheader ]
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%i.025 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ]
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%arrayidx = getelementptr inbounds i16, i16* %arg3, i32 %i.025
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%0 = load i16, i16* %arrayidx, align 2
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%add = add nuw nsw i32 %i.025, 1
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%arrayidx1 = getelementptr inbounds i16, i16* %arg3, i32 %add
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%1 = load i16, i16* %arrayidx1, align 2
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%arrayidx3 = getelementptr inbounds i16, i16* %arg2, i32 %i.025
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%2 = load i16, i16* %arrayidx3, align 2
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%conv = sext i16 %2 to i32
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%conv4 = sext i16 %0 to i32
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%mul = mul nsw i32 %conv, %conv4
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%arrayidx6 = getelementptr inbounds i16, i16* %arg2, i32 %add
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%3 = load i16, i16* %arrayidx6, align 2
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%conv7 = sext i16 %3 to i32
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%conv8 = sext i16 %1 to i32
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%mul9 = mul nsw i32 %conv7, %conv8
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%add10 = add i32 %mul, %mac1.026
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; And here the Add is the LHS, the Mul the RHS
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%add11 = add i32 %add10, %mul9
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%exitcond = icmp ne i32 %add, %arg
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br i1 %exitcond, label %for.body, label %for.cond.cleanup
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}
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; Here we have i8 loads, which we do want to support, but don't handle yet.
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;
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; CHECK-LABEL: @test2
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; CHECK-NOT: call i32 @llvm.arm.smlad
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;
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define dso_local i32 @test2(i32 %arg, i32* nocapture readnone %arg1, i8* nocapture readonly %arg2, i8* nocapture readonly %arg3) {
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entry:
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%cmp24 = icmp sgt i32 %arg, 0
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br i1 %cmp24, label %for.body.preheader, label %for.cond.cleanup
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for.body.preheader:
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%.pre = load i8, i8* %arg3, align 2
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%.pre27 = load i8, i8* %arg2, align 2
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br label %for.body
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for.cond.cleanup:
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%mac1.0.lcssa = phi i32 [ 0, %entry ], [ %add11, %for.body ]
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ret i32 %mac1.0.lcssa
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for.body:
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%mac1.026 = phi i32 [ %add11, %for.body ], [ 0, %for.body.preheader ]
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%i.025 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ]
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%arrayidx = getelementptr inbounds i8, i8* %arg3, i32 %i.025
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%0 = load i8, i8* %arrayidx, align 2
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%add = add nuw nsw i32 %i.025, 1
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%arrayidx1 = getelementptr inbounds i8, i8* %arg3, i32 %add
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%1 = load i8, i8* %arrayidx1, align 2
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%arrayidx3 = getelementptr inbounds i8, i8* %arg2, i32 %i.025
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%2 = load i8, i8* %arrayidx3, align 2
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%conv = sext i8 %2 to i32
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%conv4 = sext i8 %0 to i32
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%mul = mul nsw i32 %conv, %conv4
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%arrayidx6 = getelementptr inbounds i8, i8* %arg2, i32 %add
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%3 = load i8, i8* %arrayidx6, align 2
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%conv7 = sext i8 %3 to i32
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%conv8 = sext i8 %1 to i32
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%mul9 = mul nsw i32 %conv7, %conv8
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%add10 = add i32 %mul, %mac1.026
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%add11 = add i32 %add10, %mul9
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%exitcond = icmp ne i32 %add, %arg
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br i1 %exitcond, label %for.body, label %for.cond.cleanup
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}
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