forked from OSchip/llvm-project
120a5e9a74
This is an attempt to fill in some of the missing instructions from the Cortex-M4 schedule, and make it easier to do the same for other ARM cpus. - Some instructions are marked as hasNoSchedulingInfo as they are pseudos or otherwise do not require scheduling info - A lot of features have been marked not supported - Some WriteRes's have been added for cvt instructions. - Some extra instruction latencies have been added, notably by relaxing the regex for dsp instruction to catch more cases, and some fp instructions. This goes a long way to get the CompleteModel working for this CPU. It does not go far enough as to get all scheduling info for all output operands correct. Differential Revision: https://reviews.llvm.org/D67957 llvm-svn: 373163 |
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| .. | ||
| aliasing.ll | ||
| blocks.ll | ||
| complex_dot_prod.ll | ||
| exchange.ll | ||
| inner-full-unroll.ll | ||
| multi-use-loads.ll | ||
| overlapping.ll | ||
| pr42729.ll | ||
| pr43073.ll | ||
| sext-acc.ll | ||
| smlad0.ll | ||
| smlad1.ll | ||
| smlad2.ll | ||
| smlad3.ll | ||
| smlad4.ll | ||
| smlad5.ll | ||
| smlad8.ll | ||
| smlad9.ll | ||
| smlad10.ll | ||
| smlad11.ll | ||
| smlad12.ll | ||
| smladx-1.ll | ||
| smlald0.ll | ||
| smlald1.ll | ||
| smlald2.ll | ||
| smlaldx-1.ll | ||
| smlaldx-2.ll | ||
| unroll-n-jam-smlad.ll | ||