forked from OSchip/llvm-project
124 lines
3.3 KiB
YAML
124 lines
3.3 KiB
YAML
# RUN: llc -mtriple arm-- -run-pass=legalizer %s -o - | FileCheck %s
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# RUN: llc -mtriple thumb-- -mattr=+v6t2 -run-pass=legalizer %s -o - | FileCheck %s
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--- |
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define void @test_icmp_s8() { ret void }
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define void @test_icmp_s16() { ret void }
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define void @test_icmp_s32() { ret void }
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define void @test_icmp_p0() { ret void }
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...
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---
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name: test_icmp_s8
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# CHECK-LABEL: name: test_icmp_s8
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legalized: false
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# CHECK: legalized: true
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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- { id: 3, class: _ }
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- { id: 4, class: _ }
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- { id: 5, class: _ }
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body: |
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bb.0:
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liveins: $r0, $r1
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%0(p0) = COPY $r0
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%1(s8) = G_LOAD %0 :: (load 1)
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%2(p0) = COPY $r1
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%3(s8) = G_LOAD %2 :: (load 1)
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%4(s1) = G_ICMP intpred(ne), %1(s8), %3
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; G_ICMP with s8 should widen
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; CHECK: {{%[0-9]+}}:_(s1) = G_ICMP intpred(ne), {{%[0-9]+}}(s32), {{%[0-9]+}}
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; CHECK-NOT: {{%[0-9]+}}:_(s1) = G_ICMP intpred(ne), {{%[0-9]+}}(s8), {{%[0-9]+}}
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%5(s32) = G_ZEXT %4(s1)
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$r0 = COPY %5(s32)
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BX_RET 14, $noreg, implicit $r0
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...
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---
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name: test_icmp_s16
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# CHECK-LABEL: name: test_icmp_s16
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legalized: false
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# CHECK: legalized: true
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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- { id: 3, class: _ }
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- { id: 4, class: _ }
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- { id: 5, class: _ }
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body: |
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bb.0:
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liveins: $r0, $r1
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%0(p0) = COPY $r0
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%1(s16) = G_LOAD %0 :: (load 2)
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%2(p0) = COPY $r1
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%3(s16) = G_LOAD %2 :: (load 2)
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%4(s1) = G_ICMP intpred(slt), %1(s16), %3
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; G_ICMP with s16 should widen
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; CHECK: {{%[0-9]+}}:_(s1) = G_ICMP intpred(slt), {{%[0-9]+}}(s32), {{%[0-9]+}}
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; CHECK-NOT: {{%[0-9]+}}:_(s1) = G_ICMP intpred(slt), {{%[0-9]+}}(s16), {{%[0-9]+}}
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%5(s32) = G_ZEXT %4(s1)
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$r0 = COPY %5(s32)
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BX_RET 14, $noreg, implicit $r0
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...
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---
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name: test_icmp_s32
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# CHECK-LABEL: name: test_icmp_s32
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legalized: false
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# CHECK: legalized: true
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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- { id: 3, class: _ }
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body: |
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bb.0:
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liveins: $r0, $r1
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%0(s32) = COPY $r0
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%1(s32) = COPY $r1
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%2(s1) = G_ICMP intpred(eq), %0(s32), %1
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; G_ICMP with s32 is legal, so we should find it unchanged in the output
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; CHECK: {{%[0-9]+}}:_(s1) = G_ICMP intpred(eq), {{%[0-9]+}}(s32), {{%[0-9]+}}
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%3(s32) = G_ZEXT %2(s1)
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$r0 = COPY %3(s32)
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BX_RET 14, $noreg, implicit $r0
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...
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---
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name: test_icmp_p0
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# CHECK-LABEL: name: test_icmp_p0
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legalized: false
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# CHECK: legalized: true
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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- { id: 3, class: _ }
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body: |
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bb.0:
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liveins: $r0, $r1
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%0(p0) = COPY $r0
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%1(p0) = COPY $r1
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%2(s1) = G_ICMP intpred(eq), %0(p0), %1
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; G_ICMP with p0 is legal, so we should find it unchanged in the output
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; CHECK: {{%[0-9]+}}:_(s1) = G_ICMP intpred(eq), {{%[0-9]+}}(p0), {{%[0-9]+}}
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%3(s32) = G_ZEXT %2(s1)
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$r0 = COPY %3(s32)
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BX_RET 14, $noreg, implicit $r0
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...
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