llvm-project/llvm/lib/Target/AMDGPU
Tom Stellard 4694ed0a14 AMDPGU/SI: Use correct resource descriptors for VI on HSA
Summary: We need to set MTYPE = 2 for VI shaders when targeting the HSA runtime.

Reviewers: arsenm

Differential Revision: http://reviews.llvm.org/D10777

llvm-svn: 240841
2015-06-26 21:58:42 +00:00
..
AsmParser AMDGPU/SI: Update amd_kernel_code_t definition and add assembler support 2015-06-26 21:58:31 +00:00
InstPrinter AMDGPU: s/R600/AMDGPU/ in the Makefiles 2015-06-13 05:11:14 +00:00
MCTargetDesc AMDGPU/SI: Update amd_kernel_code_t definition and add assembler support 2015-06-26 21:58:31 +00:00
TargetInfo AMDGPU: s/R600/AMDGPU/ in the Makefiles 2015-06-13 05:11:14 +00:00
Utils AMDGPU/SI: Update amd_kernel_code_t definition and add assembler support 2015-06-26 21:58:31 +00:00
AMDGPU.h
AMDGPU.td AMDGPU/SI: Add hsa code object directives 2015-06-26 21:15:07 +00:00
AMDGPUAlwaysInlinePass.cpp
AMDGPUAsmPrinter.cpp AMDGPU/SI: Update amd_kernel_code_t definition and add assembler support 2015-06-26 21:58:31 +00:00
AMDGPUAsmPrinter.h AMDGPU/SI: Emit amd_kernel_code_t in EmitFunctionBodyStart() 2015-06-26 21:14:58 +00:00
AMDGPUCallingConv.td
AMDGPUFrameLowering.cpp
AMDGPUFrameLowering.h
AMDGPUISelDAGToDAG.cpp
AMDGPUISelLowering.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
AMDGPUISelLowering.h
AMDGPUInstrInfo.cpp
AMDGPUInstrInfo.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
AMDGPUInstrInfo.td
AMDGPUInstructions.td
AMDGPUIntrinsicInfo.cpp
AMDGPUIntrinsicInfo.h
AMDGPUIntrinsics.td
AMDGPUMCInstLower.cpp
AMDGPUMCInstLower.h
AMDGPUMachineFunction.cpp
AMDGPUMachineFunction.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
AMDGPUPromoteAlloca.cpp
AMDGPURegisterInfo.cpp
AMDGPURegisterInfo.h
AMDGPURegisterInfo.td
AMDGPUSubtarget.cpp AMDGPU/SI: Add hsa code object directives 2015-06-26 21:15:07 +00:00
AMDGPUSubtarget.h AMDGPU/SI: Add hsa code object directives 2015-06-26 21:15:07 +00:00
AMDGPUTargetMachine.cpp
AMDGPUTargetMachine.h
AMDGPUTargetTransformInfo.cpp
AMDGPUTargetTransformInfo.h
AMDILCFGStructurizer.cpp
AMDKernelCodeT.h AMDGPU/SI: Update amd_kernel_code_t definition and add assembler support 2015-06-26 21:58:31 +00:00
CIInstructions.td
CMakeLists.txt AMDGPU/SI: Add hsa code object directives 2015-06-26 21:15:07 +00:00
CaymanInstructions.td
EvergreenInstructions.td
LLVMBuild.txt AMDGPU/SI: Add hsa code object directives 2015-06-26 21:15:07 +00:00
Makefile AMDGPU/SI: Add hsa code object directives 2015-06-26 21:15:07 +00:00
Processors.td AMDGPU/SI: Add hsa code object directives 2015-06-26 21:15:07 +00:00
R600ClauseMergePass.cpp
R600ControlFlowFinalizer.cpp
R600Defines.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
R600EmitClauseMarkers.cpp
R600ExpandSpecialInstrs.cpp
R600ISelLowering.cpp
R600ISelLowering.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
R600InstrFormats.td
R600InstrInfo.cpp Replace copy-pasted debug value skipping with MBB::getLastNonDebugInstr 2015-06-25 13:28:24 +00:00
R600InstrInfo.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
R600Instructions.td
R600Intrinsics.td
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
R600MachineScheduler.cpp
R600MachineScheduler.h
R600OptimizeVectorRegisters.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
R600Packetizer.cpp
R600RegisterInfo.cpp
R600RegisterInfo.h
R600RegisterInfo.td
R600Schedule.td
R600TextureIntrinsicsReplacer.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
R700Instructions.td
SIAnnotateControlFlow.cpp
SIDefines.h AMDGPU/SI: Update amd_kernel_code_t definition and add assembler support 2015-06-26 21:58:31 +00:00
SIFixControlFlowLiveIntervals.cpp
SIFixSGPRCopies.cpp
SIFixSGPRLiveRanges.cpp
SIFoldOperands.cpp
SIISelLowering.cpp AMDGPU/SI: There are no implicit kernel args in the amdhsa ABI 2015-06-26 21:15:03 +00:00
SIISelLowering.h
SIInsertWaits.cpp
SIInstrFormats.td
SIInstrInfo.cpp AMDPGU/SI: Use correct resource descriptors for VI on HSA 2015-06-26 21:58:42 +00:00
SIInstrInfo.h AMDGPU: really don't commute REV opcodes if the target variant doesn't exist 2015-06-26 20:29:10 +00:00
SIInstrInfo.td
SIInstructions.td
SIIntrinsics.td
SILoadStoreOptimizer.cpp
SILowerControlFlow.cpp
SILowerI1Copies.cpp
SIMachineFunctionInfo.cpp
SIMachineFunctionInfo.h
SIPrepareScratchRegs.cpp
SIRegisterInfo.cpp
SIRegisterInfo.h
SIRegisterInfo.td
SISchedule.td
SIShrinkInstructions.cpp
SITypeRewriter.cpp
VIInstrFormats.td
VIInstructions.td