llvm-project/llvm/test/CodeGen
Craig Topper ebb7ddc633 [X86] Teach lower1BitShuffle to match right shifts with upper zero elements on types that don't natively support KSHIFT.
We can support these by widening to a supported type,
then shifting all the way to the left and then
back to the right to ensure that we shift in zeroes.

llvm-svn: 369232
2019-08-19 05:45:39 +00:00
..
AArch64 Revert Revert [AArch64InstrInfo] Stop getInstSizeInBytes returning non-zero for meta instructions. 2019-08-17 09:22:36 +00:00
AMDGPU AMDGPU: Fix iterator error when lowering SI_END_CF 2019-08-18 00:20:44 +00:00
ARC
ARM Reland "[ARM] push LR before __gnu_mcount_nc" 2019-08-16 23:30:16 +00:00
AVR [AVR] Fix tests after r363757 2019-07-04 06:12:47 +00:00
BPF [BPF] Fix bpf llvm-objdump issues. 2019-08-17 22:12:00 +00:00
Generic
Hexagon [Hexagon] Generate min/max instructions for 64-bit vectors 2019-08-16 16:16:27 +00:00
Inputs [CodeGen] Add stack protector tests where the guard gets re-assigned 2019-07-17 20:46:16 +00:00
Lanai [SDAG] commute setcc operands to match a subtract 2019-07-10 23:23:54 +00:00
MIR [DebugInfo] MCP: collect and update DBG_VALUEs encountered in local block 2019-08-14 12:20:02 +00:00
MSP430
Mips [mips] Remove redundant case in the test. NFC 2019-08-14 16:27:07 +00:00
NVPTX [NVPTX] Fix PR41651 2019-07-30 19:52:01 +00:00
PowerPC [CodeGen] Do the Simple Early Return in block-placement pass to optimize the blocks 2019-08-17 14:37:05 +00:00
RISCV [RISCV] Lower inline asm constraint A for RISC-V 2019-08-16 10:28:34 +00:00
SPARC
SystemZ [SystemZ] Regenerate <8 x i31> store test 2019-07-29 09:49:23 +00:00
Thumb Revert r368339 "[MBP] Disable aggressive loop rotate in plain mode" 2019-08-12 14:23:13 +00:00
Thumb2 [ARM] Correct register for narrowing and widening MVE loads and stores. 2019-08-16 13:42:39 +00:00
WebAssembly Revert r368276 "[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::EXTRACT_VECTOR_ELT" 2019-08-13 09:33:25 +00:00
WinCFGuard
WinEH IR: print value numbers for unnamed function arguments 2019-08-03 14:28:34 +00:00
X86 [X86] Teach lower1BitShuffle to match right shifts with upper zero elements on types that don't natively support KSHIFT. 2019-08-19 05:45:39 +00:00
XCore