forked from OSchip/llvm-project
65 lines
1.5 KiB
LLVM
65 lines
1.5 KiB
LLVM
; RUN: llc -march=hexagon -mcpu=hexagonv5 -hexagon-eif=0 -print-machineinstrs=if-converter %s -o /dev/null 2>&1 | FileCheck %s
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; Check that the edge weights are updated correctly after if-conversion.
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; CHECK: bb.3.if{{[0-9a-zA-Z.]*}}:
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; CHECK: successors: %bb.2(0x0ccccccd), %bb.1(0x73333333)
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@a = external global i32
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@d = external global i32
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; In the following CFG, A,B,C,D will be if-converted into a single block.
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; Check if the edge weights on edges to E and F are maintained correctly.
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;
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; A
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; / \
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; B C
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; \ /
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; D
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; / \
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; E F
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;
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define void @test1(i8 zeroext %la, i8 zeroext %lb) {
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entry:
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%cmp0 = call i1 @pred()
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br i1 %cmp0, label %if.else2, label %if.then0, !prof !1
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if.else2:
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call void @bar(i32 2)
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br label %if.end2
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if.end2:
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call void @foo(i32 2)
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br label %return
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if.end:
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%storemerge = phi i32 [ %and, %if.else ], [ %shl, %if.then ]
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store i32 %storemerge, i32* @a, align 4
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%0 = load i32, i32* @d, align 4
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%cmp2 = call i1 @pred()
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br i1 %cmp2, label %if.end2, label %if.else2, !prof !2
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if.then0:
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%cmp = icmp eq i8 %la, %lb
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br i1 %cmp, label %if.then, label %if.else, !prof !1
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if.then:
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%conv1 = zext i8 %la to i32
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%shl = shl nuw nsw i32 %conv1, 16
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br label %if.end
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if.else:
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%and8 = and i8 %lb, %la
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%and = zext i8 %and8 to i32
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br label %if.end
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return:
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call void @foo(i32 2)
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ret void
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}
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declare void @foo(i32)
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declare void @bar(i32)
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declare i1 @pred()
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!1 = !{!"branch_weights", i32 80, i32 20}
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!2 = !{!"branch_weights", i32 10, i32 90}
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