Petar Avramovic 641906da8d AMDGPU/GlobalISel: Fix constant bus restriction errors for med3 ... Detected on targets older then gfx10 (e.g. gfx9) for constants that are too large to be inlined (constant are sgpr by default). In med3 combine it is expected that regbankselect maps all operands of min/max we try to match to vgpr. However constants are mapped to sgpr and there will be a sgpr-to-vgpr copy. Matchers look through sgpr-to-vgpr copies and return sgpr and these break constant bus restriction. Build med3 with all vgpr operands. Use existing sgpr-to-vgpr copies for matched sgprs. If there is no such copy (not expected) build one. Differential Revision: https://reviews.llvm.org/D114700		2021-12-01 21:36:37 +01:00
..
add.v2i16.ll	[AMDGPU] Switch PostRA sched to MachineSched	2021-09-14 15:11:27 -04:00
add_shl.ll	[AMDGPU] Make some VOP3 insts commutable	2021-04-28 13:59:08 -04:00
amdgpu-irtranslator.ll	…
andn2.ll	[AMDGPU] Switch PostRA sched to MachineSched	2021-09-14 15:11:27 -04:00
artifact-combiner-anyext.mir	[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner	2021-08-24 11:09:56 +02:00
artifact-combiner-build-vector.mir	GlobalISel: Revisit users of other merge opcodes in artifact combiner	2020-08-17 13:56:53 -04:00
artifact-combiner-concat-vectors.mir	[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner	2021-08-24 11:09:56 +02:00
artifact-combiner-extract.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
artifact-combiner-sext.mir	[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner	2021-08-24 11:09:56 +02:00
artifact-combiner-trunc.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
artifact-combiner-unmerge-values.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
artifact-combiner-zext.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
ashr.ll	[AMDGPU] Check for unneeded shift mask in shift PatFrags.	2021-11-24 10:53:12 +05:30
atomic_load_local.ll	[AMDGPU] Add patterns for i8/i16 local atomic load/store	2021-10-18 11:23:10 +02:00
atomic_optimizations_mul_one.ll	[AMDGPU] Do not generate ELF symbols for the local branch target labels	2021-11-20 10:32:41 +05:30
atomic_store_local.ll	[AMDGPU] Add patterns for i8/i16 local atomic load/store	2021-10-18 11:23:10 +02:00
bool-legalization.ll	[AMDGPU] Do not generate ELF symbols for the local branch target labels	2021-11-20 10:32:41 +05:30
bswap.ll	[AArch64][GlobalISel] combine and + [la]sr => ubfx	2021-10-18 10:33:01 -07:00
buffer-schedule.ll	[AMDGPU][GISel] Fix MMO for raw/struct buffer access with non-constant offset	2021-07-26 14:27:30 +01:00
bug-legalization-artifact-combiner-dead-def.ll	GlobalISel: Fix infinite loop in legalization artifact combiner	2021-08-02 12:58:10 +02:00
bug-legalization-artifact-combiner-dead-def.mir	[GlobalISel][Legalizer] Don't use eraseFromParentAndMarkDBGValuesForRemoval() for some artifacts.	2021-09-20 23:34:42 -07:00
combine-add-nullptr.mir	[GlobalISel] Avoid making G_PTR_ADD with nullptr	2020-10-13 13:02:55 +02:00
combine-add-to-ptradd.mir	GlobalISel: Combine G_ADD of G_PTRTOINT to G_PTR_ADD	2020-08-26 08:57:15 -04:00
combine-amdgpu-cvt-f32-ubyte.mir	GlobalISel: Add combines for extend operations	2020-09-01 08:50:06 -07:00
combine-ashr-narrow.mir	…
combine-ext-legalizer.mir	[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner	2021-08-24 11:09:56 +02:00
combine-fabs-fneg.mir	[GlobalISel] Combine fabs(fneg(x)) to fabs(x)	2021-10-05 13:43:39 +02:00
combine-fcanonicalize.mir	AMDGPU/GlobalISel: Remove redundant G_FCANONICALIZE	2021-04-27 12:26:37 +02:00
combine-fma-add-ext-fma.ll	[AMDGPU][GlobalISel] Transform (fadd (fma x, y, (fpext (fmul u, v))), z) -> (fma x, y, (fma (fpext u), (fpext v), z))	2021-11-29 16:27:21 +01:00
combine-fma-add-ext-mul.ll	[AMDGPU][GlobalISel] Transform (fadd (fpext (fmul x, y)), z) -> (fma (fpext x), (fpext y), z)	2021-11-29 16:27:21 +01:00
combine-fma-add-fma-mul.ll	[AMDGPU][GlobalISel] Transform (fadd (fma x, y, (fmul u, v)), z) -> (fma x, y, (fma u, v, z))	2021-11-29 16:27:21 +01:00
combine-fma-add-mul-post-legalize.mir	[AMDGPU][GlobalISel] Transform (fadd (fmul x, y), z) -> (fma x, y, z)	2021-11-29 16:27:21 +01:00
combine-fma-add-mul-pre-legalize.mir	[AMDGPU][GlobalISel] Transform (fadd (fmul x, y), z) -> (fma x, y, z)	2021-11-29 16:27:21 +01:00
combine-fma-add-mul.ll	[AMDGPU][GlobalISel] Transform (fadd (fmul x, y), z) -> (fma x, y, z)	2021-11-29 16:27:21 +01:00
combine-fma-sub-ext-mul.ll	[AMDGPU][GlobalISel] Transform (fsub (fpext (fmul x, y)), z) -> (fma (fpext x), (fpext y), (fneg z))	2021-11-29 16:27:22 +01:00
combine-fma-sub-ext-neg-mul.ll	[AMDGPU][GlobalISel] Transform (fsub (fpext (fneg (fmul x, y))), z) -> (fneg (fma (fpext x), (fpext y), z))	2021-11-29 16:27:22 +01:00
combine-fma-sub-mul.ll	[AMDGPU][GlobalISel] Transform (fsub (fmul x, y), z) -> (fma x, y, -z)	2021-11-29 16:27:22 +01:00
combine-fma-sub-neg-mul.ll	[AMDGPU][GlobalISel] Transform (fsub (fneg (fmul, x, y)), z) -> (fma (fneg x), y, (fneg z))	2021-11-29 16:27:22 +01:00
combine-foldable-fneg.mir	[AMDGPU][GlobalISel] Fold G_FNEG above when users cannot fold mods	2021-11-17 14:25:13 +01:00
combine-fsh.mir	[GlobalISel] Add matchers for constant splat.	2021-11-30 15:18:50 +05:30
combine-itofp.mir	AMDGPU/GlobalISel: Fix asserts on non-s32 sitofp/uitofp sources	2020-06-23 10:00:35 -04:00
combine-lshr-narrow.mir	…
combine-or-redundant.mir	[GlobalISel] Add combine for (x | mask) -> x when (x | mask) == x	2020-11-10 11:32:13 +01:00
combine-redundant-and.mir	[GlobalISel] Implement computeKnownBits for G_SEXT_INREG	2021-01-26 15:01:38 -08:00
combine-redundant-neg.mir	[GlobalISel] Combine for eliminating redundant operand negations	2021-10-08 14:29:22 +02:00
combine-rot.mir	[GlobalISel] Add matchers for constant splat.	2021-11-30 15:18:50 +05:30
combine-rsq.ll	Code quality: Combine V_RSQ	2021-11-30 17:17:15 +01:00
combine-rsq.mir	Code quality: Combine V_RSQ	2021-11-30 17:17:15 +01:00
combine-sext-inreg.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
combine-shift-imm-chain-illegal-types.mir	[AMDGPU][GlobalISel] Fold a chain of two shift instructions with constant operands	2020-11-10 11:32:12 +01:00
combine-shift-imm-chain-shlsat.mir	[AMDGPU][GlobalISel] Fold a chain of two shift instructions with constant operands	2020-11-10 11:32:12 +01:00
combine-shift-imm-chain.ll	[AMDGPU][GlobalISel] Fold a chain of two shift instructions with constant operands	2020-11-10 11:32:12 +01:00
combine-shift-of-shifted-logic-shlsat.mir	[AMDGPU][GlobalISel] Combine shift + logic + shift with constant operands	2020-11-10 11:32:13 +01:00
combine-shift-of-shifted-logic.ll	[GlobalISel] Add combine for (x | mask) -> x when (x | mask) == x	2020-11-10 11:32:13 +01:00
combine-shl-from-extend-narrow.postlegal.mir	GlobalISel: Reduce G_SHL width if source is extension	2020-08-24 09:42:40 -04:00
combine-shl-from-extend-narrow.prelegal.mir	GlobalISel: Add combines for extend operations	2020-09-01 08:50:06 -07:00
combine-shl-narrow.mir	[GlobalISel] Add `X,Y<dead> = G_UNMERGE Z` -> X = G_TRUNC Z	2020-09-14 17:27:23 -07:00
combine-short-clamp.ll	[AMDGPU][MC][GFX10][GFX90A] Corrected _e32/_e64 suffices	2021-04-01 14:21:00 +03:00
combine-trunc-shl.mir	GlobalISel: Fix truncating shift amount in trunc (shl) combine	2020-09-23 09:07:50 -04:00
combine-urem-pow-2.mir	[GlobalISel] Add support for constant vector folding of binops in CSEMIRBuilder.	2021-10-12 11:31:22 -07:00
combine-zext-trunc.mir	Reland [GlobalISel] Combine zext(trunc x) to x	2021-03-05 11:05:37 +01:00
constant-bus-restriction.ll	[AMDGPU] Stop adding an implicit def of vcc_hi for wave32	2020-12-02 10:11:42 +00:00
cvt_f32_ubyte.ll	[AArch64][GlobalISel] combine and + [la]sr => ubfx	2021-10-18 10:33:01 -07:00
divergent-control-flow.ll	[AMDGPU] Do not generate ELF symbols for the local branch target labels	2021-11-20 10:32:41 +05:30
dummy-target.ll	[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner	2021-08-24 11:09:56 +02:00
dynamic-alloca-divergent.ll	AMDGPU/GlobalISel: Work around verifier error in test	2020-07-09 10:24:16 -04:00
dynamic-alloca-uniform.ll	AMDGPU: Mark prolog/epilog SCC defs as dead	2021-11-15 21:35:06 -05:00
extractelement-stack-lower.ll	RegAllocGreedy: Account for reserved registers in num regs heuristic	2021-09-14 21:00:29 -04:00
extractelement.i8.ll	[AMDGPU] Switch PostRA sched to MachineSched	2021-09-14 15:11:27 -04:00
extractelement.i16.ll	[AMDGPU] Switch PostRA sched to MachineSched	2021-09-14 15:11:27 -04:00
extractelement.i128.ll	[AMDGPU] Enable load clustering in the post-RA scheduler	2021-10-13 17:12:26 +01:00
extractelement.ll	[AMDGPU] Switch PostRA sched to MachineSched	2021-09-14 15:11:27 -04:00
fdiv.f16.ll	GlobalISel: Use DAG call lowering infrastructure in a more compatible way	2021-05-05 17:35:02 -04:00
fdiv.f32.ll	[AMDGPU] Prefer v_fmac over v_fma only when no source modifiers are used	2021-09-21 11:57:45 +01:00
fdiv.f64.ll	[AMDGPU] Switch PostRA sched to MachineSched	2021-09-14 15:11:27 -04:00
flat-scratch-init.ll	[AMDGPU] Init scratch only if necessary	2021-07-14 10:45:22 +02:00
flat-scratch.ll	PrologEpilogInserter: Use explicit control for scavenge slot placement	2021-11-23 18:01:12 -05:00
floor.f64.ll	[AMDGPU] Switch PostRA sched to MachineSched	2021-09-14 15:11:27 -04:00
fma.ll	[GlobalISel] Combine for eliminating redundant operand negations	2021-10-08 14:29:22 +02:00
fmax_legacy.ll	Revert "[AMDGPU] Insert waitcnt after returning from call"	2020-09-23 17:16:39 +02:00
fmed3.ll	[AMDGPU] Switch PostRA sched to MachineSched	2021-09-14 15:11:27 -04:00
fmin_legacy.ll	Revert "[AMDGPU] Insert waitcnt after returning from call"	2020-09-23 17:16:39 +02:00
fmul.v2f16.ll	[GlobalISel] Combine for eliminating redundant operand negations	2021-10-08 14:29:22 +02:00
fp64-atomics-gfx90a.ll	[AMDGPU] gfx90a support	2021-02-17 16:01:32 -08:00
fpow.ll	[AMDGPU] Switch PostRA sched to MachineSched	2021-09-14 15:11:27 -04:00
frem.ll	GlobalISel: Avoid use of G_INSERT in insertParts	2021-06-08 14:44:24 -04:00
fshl.ll	[AMDGPU] Check for unneeded shift mask in shift PatFrags.	2021-11-24 10:53:12 +05:30
fshr.ll	[AMDGPU] Check for unneeded shift mask in shift PatFrags.	2021-11-24 10:53:12 +05:30
function-returns.ll	GlobalISel: Preserve memory types for implicit sret load/stores	2021-07-19 11:52:42 -04:00
global-value.illegal.ll	…
global-value.ll	AMDGPU/GlobalISel: Preserve more memory types	2021-07-16 08:57:26 -04:00
hip.extern.shared.array.ll	[amdgpu] Add codegen support for HIP dynamic shared memory.	2020-08-20 21:29:18 -04:00
image_ls_mipmap_zero.a16.ll	[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner	2021-08-24 11:09:56 +02:00
image_ls_mipmap_zero.ll	[AMDGPU] Stop adding an implicit def of vcc_hi for wave32	2020-12-02 10:11:42 +00:00
inline-asm.ll	Reapply "RegAllocFast: Rewrite and improve"	2020-09-30 10:35:25 -04:00
insertelement-stack-lower.ll	AMDGPU: Don't consider whether amdgpu-flat-work-group-size was set	2021-10-22 16:23:50 -04:00
insertelement.i8.ll	[AMDGPU] Switch PostRA sched to MachineSched	2021-09-14 15:11:27 -04:00
insertelement.i16.ll	[AMDGPU] Switch PostRA sched to MachineSched	2021-09-14 15:11:27 -04:00
insertelement.large.ll	AMDGPU: Don't consider whether amdgpu-flat-work-group-size was set	2021-10-22 16:23:50 -04:00
insertelement.ll	[AMDGPU] Switch PostRA sched to MachineSched	2021-09-14 15:11:27 -04:00
inst-select-abs.mir	[AMDGPU] Extend gfx10 test coverage. NFC.	2021-03-29 11:13:55 +02:00
inst-select-add.mir	[AMDGPU] Extend gfx10 test coverage. NFC.	2021-03-29 11:13:55 +02:00
inst-select-add.s16.mir	[AMDGPU] Add _e64 suffix to VOP3 Insts	2021-01-12 18:33:18 -05:00
inst-select-amdgcn.class.mir	GlobalISel/Utils: Use incoming regbank while constraining the superclasses	2021-10-30 07:20:45 -04:00
inst-select-amdgcn.class.s16.mir	GlobalISel/Utils: Use incoming regbank while constraining the superclasses	2021-10-30 07:20:45 -04:00
inst-select-amdgcn.cos.mir	GlobalISel: Infer nofpexcept flag during selection for non-strict ops	2020-06-05 13:59:46 -04:00
inst-select-amdgcn.cos.s16.mir	GlobalISel: Infer nofpexcept flag during selection for non-strict ops	2020-06-05 13:59:46 -04:00
inst-select-amdgcn.cvt.pk.i16.mir	…
inst-select-amdgcn.cvt.pk.u16.mir	…
inst-select-amdgcn.cvt.pknorm.i16.mir	…
inst-select-amdgcn.cvt.pknorm.u16.mir	…
inst-select-amdgcn.cvt.pkrtz.mir	GlobalISel: Infer nofpexcept flag during selection for non-strict ops	2020-06-05 13:59:46 -04:00
inst-select-amdgcn.ds.swizzle.mir	…
inst-select-amdgcn.exp.mir	AMDGPU/GlobalISel: Fix some broken YAML in MIR test	2020-06-05 13:59:46 -04:00
inst-select-amdgcn.fmad.ftz.mir	[AMDGPU] Add _e64 suffix to VOP3 Insts	2021-01-12 18:33:18 -05:00
inst-select-amdgcn.fmed3.mir	[AMDGPU] Add _e64 suffix to VOP3 Insts	2021-01-12 18:33:18 -05:00
inst-select-amdgcn.fmed3.s16.mir	[AMDGPU] Add _e64 suffix to VOP3 Insts	2021-01-12 18:33:18 -05:00
inst-select-amdgcn.fract.mir	GlobalISel: Infer nofpexcept flag during selection for non-strict ops	2020-06-05 13:59:46 -04:00
inst-select-amdgcn.fract.s16.mir	GlobalISel: Infer nofpexcept flag during selection for non-strict ops	2020-06-05 13:59:46 -04:00
inst-select-amdgcn.groupstaticsize.mir	AMDGPU/GlobalISel: Select llvm.amdgcn.groupstaticsize	2020-08-18 09:28:01 -04:00
inst-select-amdgcn.ldexp.mir	[AMDGPU] Add _e64 suffix to VOP3 Insts	2021-01-12 18:33:18 -05:00
inst-select-amdgcn.ldexp.s16.mir	GlobalISel: Infer nofpexcept flag during selection for non-strict ops	2020-06-05 13:59:46 -04:00
inst-select-amdgcn.mbcnt.lo.mir	…
inst-select-amdgcn.mul.u24.mir	[AMDGPU][MC][GFX8+] Enabled clamp for v_mul_i32_i24_e64 and v_mul_u32_u24_e64	2020-05-22 14:11:31 +03:00
inst-select-amdgcn.mulhi.i24.mir	[AMDGPU] Implement llvm.amdgcn.mulhi.[i,u]24 intrinsics.	2021-10-26 18:53:07 +05:30
inst-select-amdgcn.mulhi.u24.mir	[AMDGPU] Implement llvm.amdgcn.mulhi.[i,u]24 intrinsics.	2021-10-26 18:53:07 +05:30
inst-select-amdgcn.rcp.legacy.mir	GlobalISel: Infer nofpexcept flag during selection for non-strict ops	2020-06-05 13:59:46 -04:00
inst-select-amdgcn.rcp.mir	GlobalISel: Infer nofpexcept flag during selection for non-strict ops	2020-06-05 13:59:46 -04:00
inst-select-amdgcn.rcp.s16.mir	GlobalISel: Infer nofpexcept flag during selection for non-strict ops	2020-06-05 13:59:46 -04:00
inst-select-amdgcn.readfirstlane.mir	…
inst-select-amdgcn.reloc.constant.mir	AMDGPU/GlobalISel: Handle llvm.amdgcn.reloc.constant	2020-07-29 14:24:21 -04:00
inst-select-amdgcn.rsq.clamp.mir	GlobalISel: Infer nofpexcept flag during selection for non-strict ops	2020-06-05 13:59:46 -04:00
inst-select-amdgcn.rsq.legacy.mir	GlobalISel: Infer nofpexcept flag during selection for non-strict ops	2020-06-05 13:59:46 -04:00
inst-select-amdgcn.rsq.mir	GlobalISel: Infer nofpexcept flag during selection for non-strict ops	2020-06-05 13:59:46 -04:00
inst-select-amdgcn.rsq.s16.mir	GlobalISel: Infer nofpexcept flag during selection for non-strict ops	2020-06-05 13:59:46 -04:00
inst-select-amdgcn.s.barrier.mir	…
inst-select-amdgcn.s.sendmsg.mir	…
inst-select-amdgcn.sffbh.mir	…
inst-select-amdgcn.sin.mir	GlobalISel: Infer nofpexcept flag during selection for non-strict ops	2020-06-05 13:59:46 -04:00
inst-select-amdgcn.sin.s16.mir	GlobalISel: Infer nofpexcept flag during selection for non-strict ops	2020-06-05 13:59:46 -04:00
inst-select-amdgpu-atomic-cmpxchg-flat.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
inst-select-amdgpu-atomic-cmpxchg-global.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
inst-select-amdgpu-ffbh-u32.mir	…
inst-select-amdgpu-ffbl-b32.mir	[AMDGPU][GlobalISel] Add G_AMDGPU_FFBL_B32	2021-08-06 09:40:48 +01:00
inst-select-and.mir	GlobalISel/Utils: Use incoming regbank while constraining the superclasses	2021-10-30 07:20:45 -04:00
inst-select-anyext.mir	AMDGPU/GlobalISel: Fix selecting broken copies for s32->s64 anyext	2020-08-03 08:36:41 -04:00
inst-select-ashr.mir	[AMDGPU] Add _e64 suffix to VOP3 Insts	2021-01-12 18:33:18 -05:00
inst-select-ashr.s16.mir	[AMDGPU] Add _e64 suffix to VOP3 Insts	2021-01-12 18:33:18 -05:00
inst-select-ashr.v2s16.mir	[AMDGPU] Stop adding an implicit def of vcc_hi for wave32	2020-12-02 10:11:42 +00:00
inst-select-atomic-cmpxchg-local.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
inst-select-atomic-cmpxchg-region.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
inst-select-atomicrmw-add-flat.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
inst-select-atomicrmw-add-global.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
inst-select-atomicrmw-fadd-local.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
inst-select-atomicrmw-fadd-region.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
inst-select-atomicrmw-xchg-local.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
inst-select-atomicrmw-xchg-region.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
inst-select-bitcast.mir	…
inst-select-bitreverse.mir	[AMDGPU] Better codegen for i64 bitreverse	2021-02-26 15:51:36 +00:00
inst-select-br.mir	…
inst-select-brcond.mir	GlobalISel/Utils: Use incoming regbank while constraining the superclasses	2021-10-30 07:20:45 -04:00
inst-select-bswap.mir	[AMDGPU] Add _e64 suffix to VOP3 Insts	2021-01-12 18:33:18 -05:00
inst-select-build-vector-trunc.v2s16.mir	[AMDGPU][GlobalISel] Avoid selecting S_PACK with constants	2021-01-20 11:54:53 +01:00
inst-select-build-vector.mir	AMDGPU/GlobalISel: Remove some selection tests which should be invalid	2020-06-30 19:18:01 -04:00
inst-select-concat-vectors.mir	AMDGPU/GlobalISel: Fixed handling of non-standard vectors	2020-05-27 15:44:09 -07:00
inst-select-constant.mir	GlobalISel/Utils: Use incoming regbank while constraining the superclasses	2021-10-30 07:20:45 -04:00
inst-select-copy.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
inst-select-ctlz-zero-undef.mir	…
inst-select-ctpop.mir	…
inst-select-cttz-zero-undef.mir	…
inst-select-extract-vector-elt.mir	[AMDGPU] Extend gfx10 test coverage. NFC.	2021-03-29 11:13:55 +02:00
inst-select-extract.mir	AMDGPU/GlobalISel: Add some missing tests for extract selection	2020-07-28 16:49:55 -04:00
inst-select-fabs.mir	[AMDGPU] Enable fneg and fabs divergence-driven instruction selection.	2021-11-23 19:37:07 +03:00
inst-select-fadd.s16.mir	GlobalISel: Infer nofpexcept flag during selection for non-strict ops	2020-06-05 13:59:46 -04:00
inst-select-fadd.s32.mir	GlobalISel: Infer nofpexcept flag during selection for non-strict ops	2020-06-05 13:59:46 -04:00
inst-select-fadd.s64.mir	[AMDGPU] Add _e64 suffix to VOP3 Insts	2021-01-12 18:33:18 -05:00
inst-select-fcanonicalize.mir	[AMDGPU] Enable fneg and fabs divergence-driven instruction selection.	2021-11-23 19:37:07 +03:00
inst-select-fceil.mir	GlobalISel: Infer nofpexcept flag during selection for non-strict ops	2020-06-05 13:59:46 -04:00
inst-select-fceil.s16.mir	GlobalISel: Infer nofpexcept flag during selection for non-strict ops	2020-06-05 13:59:46 -04:00
inst-select-fcmp.mir	GlobalISel/Utils: Use incoming regbank while constraining the superclasses	2021-10-30 07:20:45 -04:00
inst-select-fcmp.s16.mir	GlobalISel/Utils: Use incoming regbank while constraining the superclasses	2021-10-30 07:20:45 -04:00
inst-select-fconstant.mir	AMDGPU/GlobalISel: Fix selection of s1/s16 G_[F]CONSTANT	2020-08-18 09:28:01 -04:00
inst-select-fexp2.mir	GlobalISel: Infer nofpexcept flag during selection for non-strict ops	2020-06-05 13:59:46 -04:00
inst-select-ffloor.s16.mir	GlobalISel: Infer nofpexcept flag during selection for non-strict ops	2020-06-05 13:59:46 -04:00
inst-select-ffloor.s32.mir	GlobalISel: Infer nofpexcept flag during selection for non-strict ops	2020-06-05 13:59:46 -04:00
inst-select-ffloor.s64.mir	GlobalISel: Infer nofpexcept flag during selection for non-strict ops	2020-06-05 13:59:46 -04:00
inst-select-fma.s32.mir	[AMDGPU] Prefer v_fmac over v_fma only when no source modifiers are used	2021-09-21 11:57:45 +01:00
inst-select-fmad.s32.mir	[AMDGPU] Add _e64 suffix to VOP3 Insts	2021-01-12 18:33:18 -05:00
inst-select-fmaxnum-ieee.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
inst-select-fmaxnum-ieee.s16.mir	[AMDGPU] Extend gfx10 test coverage. NFC.	2021-03-29 11:13:55 +02:00
inst-select-fmaxnum-ieee.v2s16.mir	[AMDGPU] Extend gfx10 test coverage. NFC.	2021-03-29 11:13:55 +02:00
inst-select-fmaxnum.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
inst-select-fmaxnum.s16.mir	[AMDGPU] Extend gfx10 test coverage. NFC.	2021-03-29 11:13:55 +02:00
inst-select-fmaxnum.v2s16.mir	[AMDGPU] Extend gfx10 test coverage. NFC.	2021-03-29 11:13:55 +02:00
inst-select-fminnum-ieee.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
inst-select-fminnum-ieee.s16.mir	[AMDGPU] Extend gfx10 test coverage. NFC.	2021-03-29 11:13:55 +02:00
inst-select-fminnum-ieee.v2s16.mir	[AMDGPU] Extend gfx10 test coverage. NFC.	2021-03-29 11:13:55 +02:00
inst-select-fminnum.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
inst-select-fminnum.s16.mir	[AMDGPU] Extend gfx10 test coverage. NFC.	2021-03-29 11:13:55 +02:00
inst-select-fminnum.v2s16.mir	[AMDGPU] Extend gfx10 test coverage. NFC.	2021-03-29 11:13:55 +02:00
inst-select-fmul.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
inst-select-fmul.v2s16.mir	[AMDGPU] Extend gfx10 test coverage. NFC.	2021-03-29 11:13:55 +02:00
inst-select-fneg.mir	[AMDGPU] Enable fneg and fabs divergence-driven instruction selection.	2021-11-23 19:37:07 +03:00
inst-select-fptosi.mir	[AMDGPU] Enable fneg and fabs divergence-driven instruction selection.	2021-11-23 19:37:07 +03:00
inst-select-fptoui.mir	[AMDGPU] Enable fneg and fabs divergence-driven instruction selection.	2021-11-23 19:37:07 +03:00
inst-select-fract.f64.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
inst-select-frame-index.mir	…
inst-select-freeze.mir	[AMDGPU] Stop adding an implicit def of vcc_hi for wave32	2020-12-02 10:11:42 +00:00
inst-select-frint.mir	GlobalISel: Infer nofpexcept flag during selection for non-strict ops	2020-06-05 13:59:46 -04:00
inst-select-frint.s16.mir	GlobalISel: Infer nofpexcept flag during selection for non-strict ops	2020-06-05 13:59:46 -04:00
inst-select-fshr.mir	[AMDGPU] Add _e64 suffix to VOP3 Insts	2021-01-12 18:33:18 -05:00
inst-select-icmp.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
inst-select-icmp.s16.mir	GlobalISel/Utils: Use incoming regbank while constraining the superclasses	2021-10-30 07:20:45 -04:00
inst-select-icmp.s64.mir	…
inst-select-implicit-def.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
inst-select-insert-vector-elt.mir	[AMDGPU] Extend gfx10 test coverage. NFC.	2021-03-29 11:13:55 +02:00
inst-select-insert.mir	[AMDGPU] Fix inconsistent ---/... in MIR tests and regenerate checks	2021-04-30 14:10:50 +01:00
inst-select-insert.xfail.mir	AMDGPU/GlobalISel: Don't assert on G_INSERT > 128-bits	2020-07-25 10:05:44 -04:00
inst-select-intrinsic-trunc.mir	GlobalISel: Infer nofpexcept flag during selection for non-strict ops	2020-06-05 13:59:46 -04:00
inst-select-intrinsic-trunc.s16.mir	GlobalISel: Infer nofpexcept flag during selection for non-strict ops	2020-06-05 13:59:46 -04:00
inst-select-inttoptr.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
inst-select-load-atomic-flat.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
inst-select-load-atomic-global.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
inst-select-load-atomic-local.mir	AMDGPU/GlobalISel: Fix some incorrect memory types in tests	2021-07-16 20:20:55 -04:00
inst-select-load-constant.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
inst-select-load-flat.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
inst-select-load-global-saddr.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
inst-select-load-global.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
inst-select-load-global.s96.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
inst-select-load-local-128.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
inst-select-load-local.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
inst-select-load-private.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
inst-select-load-smrd.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
inst-select-lshr.mir	[AMDGPU] Add _e64 suffix to VOP3 Insts	2021-01-12 18:33:18 -05:00
inst-select-lshr.s16.mir	[AMDGPU] Add _e64 suffix to VOP3 Insts	2021-01-12 18:33:18 -05:00
inst-select-lshr.v2s16.mir	[AMDGPU] Stop adding an implicit def of vcc_hi for wave32	2020-12-02 10:11:42 +00:00
inst-select-merge-values.mir	AMDGPU/GlobalISel: Remove some selection tests which should be invalid	2020-06-30 19:18:01 -04:00
inst-select-mul.mir	[AMDGPU] Add _e64 suffix to VOP3 Insts	2021-01-12 18:33:18 -05:00
inst-select-or.mir	GlobalISel/Utils: Use incoming regbank while constraining the superclasses	2021-10-30 07:20:45 -04:00
inst-select-pattern-add3.mir	[AMDGPU] Extend gfx10 test coverage. NFC.	2021-03-29 11:13:55 +02:00
inst-select-pattern-and-or.mir	[AMDGPU] Extend gfx10 test coverage. NFC.	2021-03-29 11:13:55 +02:00
inst-select-pattern-or3.mir	[AMDGPU] Extend gfx10 test coverage. NFC.	2021-03-29 11:13:55 +02:00
inst-select-pattern-smed3.mir	[AMDGPU] Add _e64 suffix to VOP3 Insts	2021-01-12 18:33:18 -05:00
inst-select-pattern-smed3.s16.mir	[AMDGPU] Extend gfx10 test coverage. NFC.	2021-03-29 11:13:55 +02:00
inst-select-pattern-umed3.mir	[AMDGPU] Add _e64 suffix to VOP3 Insts	2021-01-12 18:33:18 -05:00
inst-select-pattern-umed3.s16.mir	[AMDGPU] Extend gfx10 test coverage. NFC.	2021-03-29 11:13:55 +02:00
inst-select-pattern-xor3.mir	[AMDGPU] Add _e64 suffix to VOP3 Insts	2021-01-12 18:33:18 -05:00
inst-select-phi.mir	AMDGPU/GlobalISel: Remove old hacks for boolean selection	2020-08-03 09:04:14 -04:00
inst-select-ptr-add.mir	[AMDGPU] Stop adding an implicit def of vcc_hi for wave32	2020-12-02 10:11:42 +00:00
inst-select-ptrmask.mir	AMDGPU/GlobalISel: Sign extend integer constants	2020-07-26 09:30:14 -04:00
inst-select-ptrtoint.mir	…
inst-select-returnaddress.mir	AMDGPU/GlobalISel: Select llvm.returnaddress	2020-08-04 17:14:38 -04:00
inst-select-sbfx.mir	[AMDGPU][GlobalISel] Legalize and select G_SBFX and G_UBFX	2021-06-28 09:06:44 -04:00
inst-select-scalar-packed.xfail.mir	…
inst-select-select.mir	[AMDGPU] Enable fneg and fabs divergence-driven instruction selection.	2021-11-23 19:37:07 +03:00
inst-select-sext-inreg.mir	[AMDGPU] Add _e64 suffix to VOP3 Insts	2021-01-12 18:33:18 -05:00
inst-select-sext.mir	[AMDGPU] Add _e64 suffix to VOP3 Insts	2021-01-12 18:33:18 -05:00
inst-select-sextload-local.mir	AMDGPU/GlobalISel: Fix selecting G_SEXTLOAD/G_ZEXTLOAD pre-gfx9	2021-07-27 15:56:42 -04:00
inst-select-shl.mir	[AMDGPU] Add _e64 suffix to VOP3 Insts	2021-01-12 18:33:18 -05:00
inst-select-shl.s16.mir	[AMDGPU] Add _e64 suffix to VOP3 Insts	2021-01-12 18:33:18 -05:00
inst-select-shl.v2s16.mir	[AMDGPU] Stop adding an implicit def of vcc_hi for wave32	2020-12-02 10:11:42 +00:00
inst-select-shuffle-vector.v2s16.mir	[AMDGPU] Extend gfx10 test coverage. NFC.	2021-03-29 11:13:55 +02:00
inst-select-sitofp.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
inst-select-smax.mir	[AMDGPU] Extend gfx10 test coverage. NFC.	2021-03-29 11:13:55 +02:00
inst-select-smin.mir	[AMDGPU] Extend gfx10 test coverage. NFC.	2021-03-29 11:13:55 +02:00
inst-select-smulh.mir	[AMDGPU] Extend gfx10 test coverage. NFC.	2021-03-29 11:13:55 +02:00
inst-select-store-atomic-flat.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
inst-select-store-atomic-local.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
inst-select-store-flat.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
inst-select-store-global.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
inst-select-store-global.s96.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
inst-select-store-local.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
inst-select-store-private.mir	AMDGPU/GlobalISel: Fix some incorrect memory types in tests	2021-07-16 20:20:55 -04:00
inst-select-sub.mir	[AMDGPU] Extend gfx10 test coverage. NFC.	2021-03-29 11:13:55 +02:00
inst-select-trunc.mir	AMDGPU/GlobalISel: re-auto-generate some test checks	2020-08-25 15:54:22 +01:00
inst-select-trunc.v2s16.mir	[AMDGPU] Extend gfx10 test coverage. NFC.	2021-03-29 11:13:55 +02:00
inst-select-uadde.gfx10.mir	[AMDGPU] Stop adding an implicit def of vcc_hi for wave32	2020-12-02 10:11:42 +00:00
inst-select-uadde.mir	[AMDGPU] Stop adding an implicit def of vcc_hi for wave32	2020-12-02 10:11:42 +00:00
inst-select-uaddo.mir	[AMDGPU] Stop adding an implicit def of vcc_hi for wave32	2020-12-02 10:11:42 +00:00
inst-select-ubfx.mir	[AMDGPU][GlobalISel] Legalize and select G_SBFX and G_UBFX	2021-06-28 09:06:44 -04:00
inst-select-uitofp.mir	[AMDGPU] Stop adding an implicit def of vcc_hi for wave32	2020-12-02 10:11:42 +00:00
inst-select-umax.mir	[AMDGPU] Extend gfx10 test coverage. NFC.	2021-03-29 11:13:55 +02:00
inst-select-umin.mir	[AMDGPU] Extend gfx10 test coverage. NFC.	2021-03-29 11:13:55 +02:00
inst-select-umulh.mir	[AMDGPU] Extend gfx10 test coverage. NFC.	2021-03-29 11:13:55 +02:00
inst-select-unmerge-values.mir	AMDGPU/GlobalISel: Ensure subreg is valid when selecting G_UNMERGE_VALUES	2020-08-04 12:27:34 -04:00
inst-select-usube.gfx10.mir	[AMDGPU] Stop adding an implicit def of vcc_hi for wave32	2020-12-02 10:11:42 +00:00
inst-select-usube.mir	[AMDGPU] Stop adding an implicit def of vcc_hi for wave32	2020-12-02 10:11:42 +00:00
inst-select-usubo.mir	[AMDGPU] Stop adding an implicit def of vcc_hi for wave32	2020-12-02 10:11:42 +00:00
inst-select-xor.mir	GlobalISel/Utils: Use incoming regbank while constraining the superclasses	2021-10-30 07:20:45 -04:00
inst-select-zext.mir	[AMDGPU] Add _e64 suffix to VOP3 Insts	2021-01-12 18:33:18 -05:00
inst-select-zextload-local.mir	AMDGPU/GlobalISel: Fix selecting G_SEXTLOAD/G_ZEXTLOAD pre-gfx9	2021-07-27 15:56:42 -04:00
irtranslator-amdgcn-sendmsg.ll	AMDGPU/GlobalISel: re-auto-generate some test checks	2020-08-25 15:54:22 +01:00
irtranslator-amdgpu_kernel-system-sgprs.ll	…
irtranslator-amdgpu_kernel.ll	AMDGPU/GlobalISel: Preserve more memory types	2021-07-16 08:57:26 -04:00
irtranslator-amdgpu_ps.ll	…
irtranslator-amdgpu_vs.ll	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
irtranslator-atomicrmw.ll	AMDGPU: Regenerate MIR test checks	2021-10-22 15:36:50 -04:00
irtranslator-call-abi-attribute-hints.ll	[AMDGPU][GlobalISel] Fix waterfall loops	2021-10-28 10:30:55 +02:00
irtranslator-call-implicit-args.ll	[AMDGPU][GlobalISel] Fix waterfall loops	2021-10-28 10:30:55 +02:00
irtranslator-call-non-fixed.ll	[AMDGPU] Changes the AMDGPU_Gfx calling convention by making the SGPRs 4..29 callee-save. This is to avoid superfluous s_movs when executing amdgpu_gfx function calls as the callee is likely not going to change the argument values.	2021-11-04 21:50:18 +01:00
irtranslator-call-return-values.ll	[AMDGPU] Changes the AMDGPU_Gfx calling convention by making the SGPRs 4..29 callee-save. This is to avoid superfluous s_movs when executing amdgpu_gfx function calls as the callee is likely not going to change the argument values.	2021-11-04 21:50:18 +01:00
irtranslator-call-sret.ll	[AMDGPU][GlobalISel] Fix waterfall loops	2021-10-28 10:30:55 +02:00
irtranslator-call.ll	[AMDGPU] Changes the AMDGPU_Gfx calling convention by making the SGPRs 4..29 callee-save. This is to avoid superfluous s_movs when executing amdgpu_gfx function calls as the callee is likely not going to change the argument values.	2021-11-04 21:50:18 +01:00
irtranslator-constantexpr.ll	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
irtranslator-constrained-fp.ll	AMDGPU: Regenerate MIR test checks	2021-10-22 15:36:50 -04:00
irtranslator-fast-math-flags.ll	…
irtranslator-fence.ll	…
irtranslator-fixed-function-abi-vgpr-args.ll	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
irtranslator-function-args.ll	AMDGPU/GlobalISel: Add a few tests for struct arguments	2021-07-16 20:20:55 -04:00
irtranslator-getelementptr.ll	[GlobalISel] Add support for constant vector folding of binops in CSEMIRBuilder.	2021-10-12 11:31:22 -07:00
irtranslator-indirect-call.ll	[AMDGPU] Changes the AMDGPU_Gfx calling convention by making the SGPRs 4..29 callee-save. This is to avoid superfluous s_movs when executing amdgpu_gfx function calls as the callee is likely not going to change the argument values.	2021-11-04 21:50:18 +01:00
irtranslator-inline-asm.ll	[AMDGPU] Make vector superclasses allocatable	2021-11-26 00:42:12 -05:00
irtranslator-memory-intrinsics.ll	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
irtranslator-metadata.ll	[GlobalISel] Support ConstantAsMetadata in IRTranslator	2021-09-21 11:24:56 -04:00
irtranslator-ptrmask.ll	GlobalISel: Merge some AMDGPU ABI lowering code to generic code	2021-02-18 17:26:55 -05:00
irtranslator-readnone-intrinsic-callsite.ll	…
irtranslator-sat.ll	GlobalISel: Merge some AMDGPU ABI lowering code to generic code	2021-02-18 17:26:55 -05:00
irtranslator-sibling-call.ll	[AMDGPU][GlobalISel] Fix waterfall loops	2021-10-28 10:30:55 +02:00
irtranslator-struct-return-intrinsics.ll	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
irtranslator-tail-call.ll	AMDGPU/GlobalISel: Implement tail calls	2021-05-13 18:57:42 -04:00
lds-global-non-entry-func.ll	[AMDGPU] Rename "LDS lowering" pass name.	2021-04-14 20:19:53 +05:30
lds-global-value.ll	[AMDGPU] Increase alignment of LDS globals if necessary before LDS lowering.	2021-06-07 18:00:41 +05:30
lds-misaligned-bug.ll	[AMDGPU] Only use ds_read/write_b128 for alignment >= 16	2021-04-08 08:12:05 +05:30
lds-relocs.ll	[AMDGPU] Lower kernel LDS into a sorted structure	2021-05-25 11:29:29 -07:00
lds-size.ll	AMDGPU: Update AMDHSA code object version handling	2020-10-14 13:04:27 -04:00
lds-zero-initializer.ll	[AMDGPU] Legalize initialized LDS variables	2021-09-23 22:53:20 -04:00
legalize-add.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-addrspacecast.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
legalize-amdgcn.if-invalid.mir	AMDGPU/GlobalISel: Tolerate negated control flow intrinsic outputs	2020-08-26 08:58:54 -04:00
legalize-amdgcn.if.xfail.mir	AMDGPU/GlobalISel: Fix masked control flow with fallthrough blocks	2020-05-22 10:31:44 -04:00
legalize-amdgcn.rsq.clamp.mir	AMDGPU/GlobalISel: Implement expansion for rsq.clamp	2020-08-06 10:23:25 -04:00
legalize-amdgcn.wavefrontsize.mir	…
legalize-and.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-anyext.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-ashr.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-atomic-cmpxchg-with-success.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
legalize-atomic-cmpxchg.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
legalize-atomicrmw-add.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
legalize-atomicrmw-and.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
legalize-atomicrmw-fadd-global.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
legalize-atomicrmw-fadd-local.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
legalize-atomicrmw-max.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
legalize-atomicrmw-min.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
legalize-atomicrmw-nand.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
legalize-atomicrmw-or.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
legalize-atomicrmw-sub.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
legalize-atomicrmw-umax.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
legalize-atomicrmw-umin.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
legalize-atomicrmw-xchg-flat.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
legalize-atomicrmw-xchg.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
legalize-atomicrmw-xor.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
legalize-bitcast.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-bitreverse.mir	[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner	2021-08-24 11:09:56 +02:00
legalize-block-addr.mir	…
legalize-brcond.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-bswap.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-build-vector-trunc.mir	[AMDGPU] Extend gfx10 test coverage. NFC.	2021-03-29 11:13:55 +02:00
legalize-build-vector.mir	…
legalize-build-vector.s16.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-concat-vectors.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-constant.mir	[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner	2021-08-24 11:09:56 +02:00
legalize-ctlz-zero-undef.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-ctlz.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-ctpop.mir	[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner	2021-08-24 11:09:56 +02:00
legalize-cttz-zero-undef.mir	[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner	2021-08-24 11:09:56 +02:00
legalize-cttz.mir	[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner	2021-08-24 11:09:56 +02:00
legalize-extract-vector-elt.mir	[GlobalISel] Widen G_EXTRACT_VECTOR_ELT using anyext instead of sext.	2021-10-04 12:19:19 -07:00
legalize-extract.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-fabs.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-fadd.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-fcanonicalize.mir	AMDGPU/GlobalISel: Restore run line erased in D109154 by mistake	2021-09-21 17:03:46 +02:00
legalize-fceil.mir	[NFC][AMDGPU][GlobalISel] Fix some legalizer tests	2021-11-17 14:25:15 +01:00
legalize-fcmp.mir	[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner	2021-08-24 11:09:56 +02:00
legalize-fconstant.mir	…
legalize-fcopysign.mir	[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner	2021-08-24 11:09:56 +02:00
legalize-fcos.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-fdiv.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-fexp.mir	[AMDGPU] Extend gfx10 test coverage. NFC.	2021-03-29 11:13:55 +02:00
legalize-fexp2.mir	[AMDGPU] Extend gfx10 test coverage. NFC.	2021-03-29 11:13:55 +02:00
legalize-ffloor.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-flog.mir	…
legalize-flog2.mir	…
legalize-flog10.mir	…
legalize-fma.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-fmad.s16.mir	…
legalize-fmad.s32.mir	[AMDGPU] gfx1031 target	2020-08-05 12:36:26 -07:00
legalize-fmad.s64.mir	…
legalize-fmaxnum.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-fminnum.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-fmul.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-fneg.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-fpext.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-fpow.mir	[AMDGPU] Extend gfx10 test coverage. NFC.	2021-03-29 11:13:55 +02:00
legalize-fpowi.mir	[AMDGPU] Extend gfx10 test coverage. NFC.	2021-03-29 11:13:55 +02:00
legalize-fptosi.mir	[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner	2021-08-24 11:09:56 +02:00
legalize-fptoui.mir	[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner	2021-08-24 11:09:56 +02:00
legalize-fptrunc.mir	[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner	2021-08-24 11:09:56 +02:00
legalize-freeze.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-frint.mir	[NFC][AMDGPU][GlobalISel] Fix some legalizer tests	2021-11-17 14:25:15 +01:00
legalize-fshl.mir	[GlobalISel][Legalizer] Use ArtifactValueFinder first for unmerge combines before trying others.	2021-09-21 00:02:15 -07:00
legalize-fshr.mir	[GlobalISel][Legalizer] Use ArtifactValueFinder first for unmerge combines before trying others.	2021-09-21 00:02:15 -07:00
legalize-fsin.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-fsqrt.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-fsub.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-icmp.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-implicit-def-s1025.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-implicit-def.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-insert-vector-elt.mir	[GlobalISel][Legalizer] Use ArtifactValueFinder first for unmerge combines before trying others.	2021-09-21 00:02:15 -07:00
legalize-insert.mir	[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner	2021-08-24 11:09:56 +02:00
legalize-intrinsic-amdgcn-fdiv-fast.mir	…
legalize-intrinsic-round.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-intrinsic-trunc.mir	[NFC][AMDGPU][GlobalISel] Fix some legalizer tests	2021-11-17 14:25:15 +01:00
legalize-inttoptr.mir	[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner	2021-08-24 11:09:56 +02:00
legalize-jump-table.mir	…
legalize-llvm.amdgcn.image.atomic.dim.a16.ll	[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner	2021-08-24 11:09:56 +02:00
legalize-llvm.amdgcn.image.dim.a16.ll	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-llvm.amdgcn.image.load.2d.d16.ll	[GlobalISel][Legalizer] Use ArtifactValueFinder first for unmerge combines before trying others.	2021-09-21 00:02:15 -07:00
legalize-llvm.amdgcn.image.load.2d.ll	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-llvm.amdgcn.image.load.2darraymsaa.ll	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
legalize-llvm.amdgcn.image.load.3d.ll	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
legalize-llvm.amdgcn.image.sample.a16.ll	[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner	2021-08-24 11:09:56 +02:00
legalize-llvm.amdgcn.image.sample.g16.ll	[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner	2021-08-24 11:09:56 +02:00
legalize-llvm.amdgcn.image.store.2d.d16.ll	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-llvm.amdgcn.s.buffer.load.mir	[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner	2021-08-24 11:09:56 +02:00
legalize-load-constant-32bit.mir	[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner	2021-08-24 11:09:56 +02:00
legalize-load-constant.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-load-flat.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-load-global.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-load-local.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-load-memory-metadata.mir	[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner	2021-08-24 11:09:56 +02:00
legalize-load-private.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-lshr.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-memcpy.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-memcpyinline.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-memmove.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-memset.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-merge-values-build-vector.mir	AMDGPU/GlobalISel: re-auto-generate some test checks	2020-08-25 15:54:22 +01:00
legalize-merge-values.mir	[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner	2021-08-24 11:09:56 +02:00
legalize-mul.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-or.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-phi.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-ptr-add.mir	[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner	2021-08-24 11:09:56 +02:00
legalize-ptrmask.mir	[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner	2021-08-24 11:09:56 +02:00
legalize-ptrtoint.mir	…
legalize-rotl-rotr.mir	[AMDGPU][GlobalISel] Legalization of G_ROTL and G_ROTR	2021-09-07 16:33:24 +02:00
legalize-sadde.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-saddo.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-saddsat.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-sbfx.mir	[AMDGPU][GlobalISel] Legalize and select G_SBFX and G_UBFX	2021-06-28 09:06:44 -04:00
legalize-sdiv.mir	[AMDGPU] Simplify 64-bit division/remainder expansion	2021-11-12 15:48:41 +00:00
legalize-select.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-sext-inreg.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-sext.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-sextload-constant-32bit.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
legalize-sextload-flat.mir	[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner	2021-08-24 11:09:56 +02:00
legalize-sextload-global.mir	[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner	2021-08-24 11:09:56 +02:00
legalize-sextload-local.mir	[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner	2021-08-24 11:09:56 +02:00
legalize-sextload-private.mir	[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner	2021-08-24 11:09:56 +02:00
legalize-shl.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-shuffle-vector.mir	[GlobalISel] Widen G_EXTRACT_VECTOR_ELT using anyext instead of sext.	2021-10-04 12:19:19 -07:00
legalize-shuffle-vector.s16.mir	[GlobalISel] Widen G_EXTRACT_VECTOR_ELT using anyext instead of sext.	2021-10-04 12:19:19 -07:00
legalize-sitofp.mir	[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner	2021-08-24 11:09:56 +02:00
legalize-smax.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-smin.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-smulh.mir	[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner	2021-08-24 11:09:56 +02:00
legalize-smulo.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-srem.mir	[AMDGPU] Simplify 64-bit division/remainder expansion	2021-11-12 15:48:41 +00:00
legalize-sshlsat.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-ssube.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-ssubo.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-ssubsat.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-store-global.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-store.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-sub.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-trunc.mir	AMDGPU/GlobalISel: Fix using unlegalizable values in tests	2020-08-25 09:39:32 -04:00
legalize-uadde.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-uaddo.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-uaddsat.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-ubfx.mir	[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner	2021-08-24 11:09:56 +02:00
legalize-udiv.mir	[AMDGPU] Simplify 64-bit division/remainder expansion	2021-11-12 15:48:41 +00:00
legalize-uitofp.mir	[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner	2021-08-24 11:09:56 +02:00
legalize-umax.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-umin.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-umulh.mir	[AMDGPU][GlobalISel] Fix legalization of G_UMULH	2021-10-05 10:56:02 +01:00
legalize-umulo.mir	[AMDGPU][GlobalISel] Fix legalization of G_UMULH	2021-10-05 10:56:02 +01:00
legalize-unmerge-values.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-urem.mir	[AMDGPU] Simplify 64-bit division/remainder expansion	2021-11-12 15:48:41 +00:00
legalize-ushlsat.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-usube.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-usubo.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-usubsat.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-xor.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-zext.mir	[GlobalISel] Improve elimination of dead instructions in legalizer	2021-09-20 13:00:58 +02:00
legalize-zextload-constant-32bit.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
legalize-zextload-flat.mir	[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner	2021-08-24 11:09:56 +02:00
legalize-zextload-global.mir	[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner	2021-08-24 11:09:56 +02:00
legalize-zextload-local.mir	[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner	2021-08-24 11:09:56 +02:00
legalize-zextload-private.mir	[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner	2021-08-24 11:09:56 +02:00
llvm.abs.ll	[AMDGPU][GlobalISel] Legalize G_ABS	2021-06-04 14:46:43 +02:00
llvm.amdgcn.atomic.dec.ll	[AMDGPU] Switch PostRA sched to MachineSched	2021-09-14 15:11:27 -04:00
llvm.amdgcn.atomic.inc.ll	[Tests] Fix incorrect noalias metadata	2021-09-18 20:51:00 +02:00
llvm.amdgcn.ballot.i32.ll	[AMDGPU] Stop adding an implicit def of vcc_hi for wave32	2020-12-02 10:11:42 +00:00
llvm.amdgcn.ballot.i64.ll	[AMDGPU][GlobalISel] Fix subregister index for EXEC register in selectBallot.	2020-07-13 13:35:34 +02:00
llvm.amdgcn.dispatch.id.ll	AMDGPU: Update AMDHSA code object version handling	2020-10-14 13:04:27 -04:00
llvm.amdgcn.dispatch.ptr.ll	AMDGPU: Update AMDHSA code object version handling	2020-10-14 13:04:27 -04:00
llvm.amdgcn.div.fmas.ll	[AMDGPU] Do not generate ELF symbols for the local branch target labels	2021-11-20 10:32:41 +05:30
llvm.amdgcn.div.scale.ll	[AMDGPU] Switch PostRA sched to MachineSched	2021-09-14 15:11:27 -04:00
llvm.amdgcn.ds.append.ll	…
llvm.amdgcn.ds.consume.ll	…
llvm.amdgcn.ds.fadd.ll	[AMDGPU] Extend gfx10 test coverage. NFC.	2021-03-29 11:13:55 +02:00
llvm.amdgcn.ds.fmax.ll	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
llvm.amdgcn.ds.fmin.ll	[AMDGPU] Extend gfx10 test coverage. NFC.	2021-03-29 11:13:55 +02:00
llvm.amdgcn.ds.gws.barrier.ll	…
llvm.amdgcn.ds.gws.init.ll	…
llvm.amdgcn.ds.gws.sema.br.ll	[NFC] Removed unused prefixes in CodeGen/AMDGPU/GlobalISel	2021-01-05 12:57:17 -08:00
llvm.amdgcn.ds.gws.sema.release.all.ll	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
llvm.amdgcn.ds.gws.sema.v.ll	[NFC] Removed unused prefixes in CodeGen/AMDGPU/GlobalISel	2021-01-05 12:57:17 -08:00
llvm.amdgcn.ds.ordered.add.gfx10.ll	…
llvm.amdgcn.ds.ordered.add.ll	AMDGPU/GlobalISel: Address some test fixmes that don't fail now	2020-07-18 10:54:39 -04:00
llvm.amdgcn.ds.ordered.swap.ll	AMDGPU/GlobalISel: Address some test fixmes that don't fail now	2020-07-18 10:54:39 -04:00
llvm.amdgcn.end.cf.i32.ll	[AMDGPU] Do not generate ELF symbols for the local branch target labels	2021-11-20 10:32:41 +05:30
llvm.amdgcn.end.cf.i64.ll	[AMDGPU] Do not generate ELF symbols for the local branch target labels	2021-11-20 10:32:41 +05:30
llvm.amdgcn.fdot2.ll	[AMDGPU][GlobalISel] Avoid selecting S_PACK with constants	2021-01-20 11:54:53 +01:00
llvm.amdgcn.fmul.legacy.ll	[AMDGPU] Shrink v_mac_legacy_f32 and v_fmac_legacy_f32	2021-11-01 13:55:53 +00:00
llvm.amdgcn.global.atomic.csub.ll	[AMDGPU] Add S_MOV_B64_IMM_PSEUDO for wide constants	2021-06-30 11:45:38 -07:00
llvm.amdgcn.global.atomic.fadd-with-ret.ll	[AMDGPU] gfx90a support	2021-02-17 16:01:32 -08:00
llvm.amdgcn.global.atomic.fadd.ll	[AMDGPU] gfx90a support	2021-02-17 16:01:32 -08:00
llvm.amdgcn.icmp.ll	[AMDGPU] Stop adding an implicit def of vcc_hi for wave32	2020-12-02 10:11:42 +00:00
llvm.amdgcn.if.break.i32.ll	[AMDGPU] Add volatile support to SIMemoryLegalizer	2021-01-09 00:52:33 +00:00
llvm.amdgcn.if.break.i64.ll	[AMDGPU] Add volatile support to SIMemoryLegalizer	2021-01-09 00:52:33 +00:00
llvm.amdgcn.image.atomic.dim.a16.ll	[AMDGPU] Switch PostRA sched to MachineSched	2021-09-14 15:11:27 -04:00
llvm.amdgcn.image.atomic.dim.ll	AMDGPU/GlobalISel: Fix selection of image intrinsics with unused return	2021-04-29 20:56:03 +02:00
llvm.amdgcn.image.atomic.dim.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
llvm.amdgcn.image.gather4.a16.dim.ll	[AMDGPU] Switch PostRA sched to MachineSched	2021-09-14 15:11:27 -04:00
llvm.amdgcn.image.gather4.dim.ll	[AMDGPU] Switch PostRA sched to MachineSched	2021-09-14 15:11:27 -04:00
llvm.amdgcn.image.gather4.o.dim.ll	[AMDGPU] Switch PostRA sched to MachineSched	2021-09-14 15:11:27 -04:00
llvm.amdgcn.image.getresinfo.a16.ll	[AMDGPU] Stop adding an implicit def of vcc_hi for wave32	2020-12-02 10:11:42 +00:00
llvm.amdgcn.image.getresinfo.ll	[AMDGPU] Stop adding an implicit def of vcc_hi for wave32	2020-12-02 10:11:42 +00:00
llvm.amdgcn.image.load.1d.d16.ll	[GlobalISel][Legalizer] Use ArtifactValueFinder first for unmerge combines before trying others.	2021-09-21 00:02:15 -07:00
llvm.amdgcn.image.load.1d.ll	[AMDGPU] Add some image tests with enable-prt-strict-null disabled. NFC.	2021-03-31 17:27:20 +01:00
llvm.amdgcn.image.load.2d.ll	[AMDGPU] Switch PostRA sched to MachineSched	2021-09-14 15:11:27 -04:00
llvm.amdgcn.image.load.2darraymsaa.a16.ll	[AMDGPU] Switch PostRA sched to MachineSched	2021-09-14 15:11:27 -04:00
llvm.amdgcn.image.load.2darraymsaa.ll	[AMDGPU] Switch PostRA sched to MachineSched	2021-09-14 15:11:27 -04:00
llvm.amdgcn.image.load.3d.a16.ll	[AMDGPU] Switch PostRA sched to MachineSched	2021-09-14 15:11:27 -04:00
llvm.amdgcn.image.load.3d.ll	[AMDGPU] Switch PostRA sched to MachineSched	2021-09-14 15:11:27 -04:00
llvm.amdgcn.image.sample.g16.ll	[AMDGPU] Switch PostRA sched to MachineSched	2021-09-14 15:11:27 -04:00
llvm.amdgcn.image.sample.ltolz.a16.ll	[AMDGPU] Make some VOP3 insts commutable	2021-04-28 13:59:08 -04:00
llvm.amdgcn.image.sample.ltolz.ll	Revert "[AMDGPU] Insert waitcnt after returning from call"	2020-09-23 17:16:39 +02:00
llvm.amdgcn.image.store.2d.d16.ll	[AMDGPU] Switch PostRA sched to MachineSched	2021-09-14 15:11:27 -04:00
llvm.amdgcn.image.store.2d.ll	[AMDGPU] Stop adding an implicit def of vcc_hi for wave32	2020-12-02 10:11:42 +00:00
llvm.amdgcn.implicit.buffer.ptr.ll	…
llvm.amdgcn.init.exec.ll	AMDGPU/GlobalISel: Select init_exec intrinsic	2020-07-01 11:50:59 +02:00
llvm.amdgcn.init.exec.wave32.ll	…
llvm.amdgcn.interp.p1.f16.ll	…
llvm.amdgcn.intersect_ray.ll	[AMDGPU] Do not generate ELF symbols for the local branch target labels	2021-11-20 10:32:41 +05:30
llvm.amdgcn.is.private.ll	[AMDGPU] Do not generate ELF symbols for the local branch target labels	2021-11-20 10:32:41 +05:30
llvm.amdgcn.is.shared.ll	[AMDGPU] Do not generate ELF symbols for the local branch target labels	2021-11-20 10:32:41 +05:30
llvm.amdgcn.kernarg.segment.ptr.ll	AMDGPU: Stop inferring use of llvm.amdgcn.kernarg.segment.ptr	2021-08-26 20:30:03 -04:00
llvm.amdgcn.mfma.gfx90a.ll	[AMDGPU] Fix global isel for kernels using agprs on gfx90a	2021-10-29 14:23:14 -07:00
llvm.amdgcn.mov.dpp.ll	[AMDGPU][MC] Corrected bound_ctrl for compatibility with sp3	2021-02-22 14:59:40 +03:00
llvm.amdgcn.mov.dpp8.ll	…
llvm.amdgcn.permlane.ll	…
llvm.amdgcn.queue.ptr.ll	AMDGPU: Update AMDHSA code object version handling	2020-10-14 13:04:27 -04:00
llvm.amdgcn.raw.buffer.atomic.add.ll	[AMDGPU][GlobalISel] Fix waterfall loops	2021-10-28 10:30:55 +02:00
llvm.amdgcn.raw.buffer.atomic.cmpswap.ll	[AMDGPU][GlobalISel] Fix waterfall loops	2021-10-28 10:30:55 +02:00
llvm.amdgcn.raw.buffer.atomic.fadd-with-ret.ll	[AMDGPU] gfx90a support	2021-02-17 16:01:32 -08:00
llvm.amdgcn.raw.buffer.atomic.fadd.ll	[AMDGPU][GlobalISel] Fix waterfall loops	2021-10-28 10:30:55 +02:00
llvm.amdgcn.raw.buffer.load.format.f16.ll	[AMDGPU][GlobalISel] Fix waterfall loops	2021-10-28 10:30:55 +02:00
llvm.amdgcn.raw.buffer.load.format.ll	[AMDGPU][GlobalISel] Fix waterfall loops	2021-10-28 10:30:55 +02:00
llvm.amdgcn.raw.buffer.load.ll	[AMDGPU][GlobalISel] Fix waterfall loops	2021-10-28 10:30:55 +02:00
llvm.amdgcn.raw.buffer.store.format.f16.ll	[AMDGPU][GlobalISel] Fix waterfall loops	2021-10-28 10:30:55 +02:00
llvm.amdgcn.raw.buffer.store.format.f32.ll	[AMDGPU][GlobalISel] Fix waterfall loops	2021-10-28 10:30:55 +02:00
llvm.amdgcn.raw.buffer.store.ll	[AMDGPU][GlobalISel] Fix waterfall loops	2021-10-28 10:30:55 +02:00
llvm.amdgcn.raw.tbuffer.load.f16.ll	[AMDGPU][GlobalISel] Fix waterfall loops	2021-10-28 10:30:55 +02:00
llvm.amdgcn.raw.tbuffer.load.ll	[AMDGPU][GlobalISel] Fix waterfall loops	2021-10-28 10:30:55 +02:00
llvm.amdgcn.raw.tbuffer.store.f16.ll	[AMDGPU][GlobalISel] Fix waterfall loops	2021-10-28 10:30:55 +02:00
llvm.amdgcn.raw.tbuffer.store.i8.ll	[AMDGPU][GlobalISel] Fix waterfall loops	2021-10-28 10:30:55 +02:00
llvm.amdgcn.raw.tbuffer.store.ll	[AMDGPU][GlobalISel] Fix waterfall loops	2021-10-28 10:30:55 +02:00
llvm.amdgcn.rsq.clamp.ll	AMDGPU/GlobalISel: Implement expansion for rsq.clamp	2020-08-06 10:23:25 -04:00
llvm.amdgcn.s.buffer.load.ll	[AMDGPU][GlobalISel] Fix waterfall loops	2021-10-28 10:30:55 +02:00
llvm.amdgcn.s.setreg.ll	[AMDGPU] Stop adding an implicit def of vcc_hi for wave32	2020-12-02 10:11:42 +00:00
llvm.amdgcn.s.sleep.ll	…
llvm.amdgcn.sbfe.ll	[GlobalISel] Constant fold G_SITOFP and G_UITOFP in CSEMIRBuilder	2021-07-27 11:27:58 +01:00
llvm.amdgcn.sdot2.ll	[NFC] Removed unused prefixes in CodeGen/AMDGPU/GlobalISel	2021-01-05 12:57:17 -08:00
llvm.amdgcn.sdot4.ll	[AMDGPU] Experiments show that the GCNRegBankReassign pass significantly impacts	2021-04-26 17:21:49 -04:00
llvm.amdgcn.sdot8.ll	[NFC] Removed unused prefixes in CodeGen/AMDGPU/GlobalISel	2021-01-05 12:57:17 -08:00
llvm.amdgcn.set.inactive.ll	[AMDGPU] Do not generate ELF symbols for the local branch target labels	2021-11-20 10:32:41 +05:30
llvm.amdgcn.softwqm.ll	…
llvm.amdgcn.struct.buffer.atomic.add.ll	[AMDGPU][GlobalISel] Fix waterfall loops	2021-10-28 10:30:55 +02:00
llvm.amdgcn.struct.buffer.atomic.cmpswap.ll	[AMDGPU][GlobalISel] Fix waterfall loops	2021-10-28 10:30:55 +02:00
llvm.amdgcn.struct.buffer.atomic.fadd-with-ret.ll	[AMDGPU] gfx90a support	2021-02-17 16:01:32 -08:00
llvm.amdgcn.struct.buffer.atomic.fadd.ll	[AMDGPU][GlobalISel] Fix waterfall loops	2021-10-28 10:30:55 +02:00
llvm.amdgcn.struct.buffer.load.format.f16.ll	[AMDGPU][GlobalISel] Fix waterfall loops	2021-10-28 10:30:55 +02:00
llvm.amdgcn.struct.buffer.load.format.ll	[AMDGPU][GlobalISel] Fix waterfall loops	2021-10-28 10:30:55 +02:00
llvm.amdgcn.struct.buffer.load.ll	[AMDGPU][GlobalISel] Fix waterfall loops	2021-10-28 10:30:55 +02:00
llvm.amdgcn.struct.buffer.store.format.f16.ll	[AMDGPU][GlobalISel] Fix waterfall loops	2021-10-28 10:30:55 +02:00
llvm.amdgcn.struct.buffer.store.format.f32.ll	[AMDGPU][GlobalISel] Fix waterfall loops	2021-10-28 10:30:55 +02:00
llvm.amdgcn.struct.buffer.store.ll	[AMDGPU][GlobalISel] Fix waterfall loops	2021-10-28 10:30:55 +02:00
llvm.amdgcn.struct.tbuffer.load.f16.ll	[AMDGPU][GlobalISel] Fix waterfall loops	2021-10-28 10:30:55 +02:00
llvm.amdgcn.struct.tbuffer.load.ll	[AMDGPU][GlobalISel] Fix waterfall loops	2021-10-28 10:30:55 +02:00
llvm.amdgcn.trig.preop.ll	[AMDGPU] Extend gfx10 test coverage. NFC.	2021-03-29 11:13:55 +02:00
llvm.amdgcn.ubfe.ll	[AArch64][GlobalISel] combine and + [la]sr => ubfx	2021-10-18 10:33:01 -07:00
llvm.amdgcn.udot2.ll	[NFC] Removed unused prefixes in CodeGen/AMDGPU/GlobalISel	2021-01-05 12:57:17 -08:00
llvm.amdgcn.udot4.ll	[AMDGPU] Experiments show that the GCNRegBankReassign pass significantly impacts	2021-04-26 17:21:49 -04:00
llvm.amdgcn.udot8.ll	[NFC] Removed unused prefixes in CodeGen/AMDGPU/GlobalISel	2021-01-05 12:57:17 -08:00
llvm.amdgcn.update.dpp.ll	[AMDGPU] Switch PostRA sched to MachineSched	2021-09-14 15:11:27 -04:00
llvm.amdgcn.workgroup.id.ll	[NFC] Removed unused prefixes in CodeGen/AMDGPU/GlobalISel	2021-01-05 12:57:17 -08:00
llvm.amdgcn.workitem.id.ll	[AMDGPU][GlobalISel] Legalize and select G_SBFX and G_UBFX	2021-06-28 09:06:44 -04:00
llvm.amdgcn.wqm.demote.ll	[AMDGPU] Do not generate ELF symbols for the local branch target labels	2021-11-20 10:32:41 +05:30
llvm.amdgcn.wqm.ll	…
llvm.amdgcn.wqm.vote.ll	…
llvm.amdgcn.writelane.ll	[AMDGPU] Stop adding an implicit def of vcc_hi for wave32	2020-12-02 10:11:42 +00:00
llvm.amdgcn.wwm.ll	[AMDGPU] Rename amdgcn_wwm to amdgcn_strict_wwm	2021-03-03 09:33:57 +01:00
llvm.memcpy.inline.ll	[AMDGPU][GlobalISel] Legalize memcpy family of intrinsics	2021-09-07 12:24:07 +02:00
llvm.memcpy.ll	[AMDGPU] Do not generate ELF symbols for the local branch target labels	2021-11-20 10:32:41 +05:30
llvm.memmove.ll	[AMDGPU] Do not generate ELF symbols for the local branch target labels	2021-11-20 10:32:41 +05:30
llvm.memset.ll	[AMDGPU] Do not generate ELF symbols for the local branch target labels	2021-11-20 10:32:41 +05:30
llvm.powi.ll	[GlobalISel] Constant fold G_SITOFP and G_UITOFP in CSEMIRBuilder	2021-07-27 11:27:58 +01:00
llvm.trap.ll	AMDGPU: Update AMDHSA code object version handling	2020-10-14 13:04:27 -04:00
load-constant.96.ll	[GlobalISel] Add a combine for and(load , mask) -> zextload	2021-09-16 10:42:46 +02:00
load-local.96.ll	[GlobalISel] Add a combine for and(load , mask) -> zextload	2021-09-16 10:42:46 +02:00
load-local.128.ll	[GlobalISel] Add a combine for and(load , mask) -> zextload	2021-09-16 10:42:46 +02:00
load-unaligned.ll	[GlobalISel] Add a combine for and(load , mask) -> zextload	2021-09-16 10:42:46 +02:00
localizer.ll	[AMDGPU] Do not generate ELF symbols for the local branch target labels	2021-11-20 10:32:41 +05:30
lshr.ll	[AMDGPU] Check for unneeded shift mask in shift PatFrags.	2021-11-24 10:53:12 +05:30
memory-legalizer-atomic-fence.ll	AMDGPU: Update AMDHSA code object version handling	2020-10-14 13:04:27 -04:00
merge-buffer-stores.ll	[AMDGPU][GlobalISel] Handle G_PTR_ADD when looking for constant offset	2021-01-28 11:20:09 +01:00
minmaxabs.ll	[IR] Add min/max/abs intrinsics	2020-07-23 20:56:19 +02:00
mubuf-global.ll	[AArch64][GlobalISel] Add a new reassociation for G_PTR_ADDs.	2021-09-14 23:57:41 -07:00
mul.ll	RegAllocGreedy: Account for reserved registers in num regs heuristic	2021-09-14 21:00:29 -04:00
mul.v2i16.ll	[AMDGPU] Extend gfx10 test coverage. NFC.	2021-03-29 11:13:55 +02:00
no-cse-nonlocal-convergent-instrs.mir	[MachineCSE][NFC]: Refactor and comment on preventing CSE for isConvergent instrs	2021-05-05 14:22:03 -07:00
no-legalize-atomic.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
non-entry-alloca.ll	[AMDGPU] Do not generate ELF symbols for the local branch target labels	2021-11-20 10:32:41 +05:30
orn2.ll	[AMDGPU] Switch PostRA sched to MachineSched	2021-09-14 15:11:27 -04:00
postlegalizer-combiner-divrem.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
postlegalizer-combiner-sextload-from-sextinreg.mir	[GlobalISel] Do not generate illegal G_SEXTLOADs after legalization	2021-08-25 10:13:39 +02:00
postlegalizercombiner-and.mir	[GlobalISel] Add a combine for and(load , mask) -> zextload	2021-09-16 10:42:46 +02:00
postlegalizercombiner-load-and-mask.mir	[GlobalISel] Add a combine for and(load , mask) -> zextload	2021-09-16 10:42:46 +02:00
postlegalizercombiner-sbfx.mir	[AMDGPU][GlobalISel] Legalize and select G_SBFX and G_UBFX	2021-06-28 09:06:44 -04:00
postlegalizercombiner-select.mir	GlobalISel: Fix matchEqualDefs for instructions with multiple defs	2021-08-05 15:05:45 +02:00
postlegalizercombiner-ubfx.mir	[AMDGPU][GlobalISel] Legalize and select G_SBFX and G_UBFX	2021-06-28 09:06:44 -04:00
prelegalizer-combiner-divrem.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
read_register.ll	…
readcyclecounter.ll	[AMDGPU] Add some GFX10.3 testing. NFC.	2021-05-11 11:21:19 +01:00
regbankcombiner-smed3.mir	AMDGPU/GlobalISel: Fix constant bus restriction errors for med3	2021-12-01 21:36:37 +01:00
regbankcombiner-umed3.mir	AMDGPU/GlobalISel: Fix constant bus restriction errors for med3	2021-12-01 21:36:37 +01:00
regbankselect-add.s16.mir	…
regbankselect-add.s32.mir	…
regbankselect-add.v2s16.mir	…
regbankselect-amdgcn-exp-compr.mir	…
regbankselect-amdgcn-exp.mir	…
regbankselect-amdgcn-s-buffer-load.mir	[AMDGPU][GlobalISel] Fix waterfall loops	2021-10-28 10:30:55 +02:00
regbankselect-amdgcn.ballot.i64.mir	AMDGPU/GlobalISel: Fix using readfirstlane with ballot intrinsics	2020-08-17 09:53:25 -04:00
regbankselect-amdgcn.class.mir	…
regbankselect-amdgcn.cvt.pkrtz.mir	…
regbankselect-amdgcn.div.fmas.mir	…
regbankselect-amdgcn.div.scale.mir	…
regbankselect-amdgcn.ds.append.mir	…
regbankselect-amdgcn.ds.bpermute.mir	…
regbankselect-amdgcn.ds.consume.mir	…
regbankselect-amdgcn.ds.gws.init.mir	…
regbankselect-amdgcn.ds.gws.sema.v.mir	…
regbankselect-amdgcn.ds.ordered.add.mir	…
regbankselect-amdgcn.ds.ordered.swap.mir	…
regbankselect-amdgcn.ds.permute.mir	…
regbankselect-amdgcn.ds.swizzle.mir	…
regbankselect-amdgcn.else.32.mir	…
regbankselect-amdgcn.else.64.mir	…
regbankselect-amdgcn.fcmp.mir	…
regbankselect-amdgcn.fmul.legacy.mir	…
regbankselect-amdgcn.groupstaticsize.mir	…
regbankselect-amdgcn.icmp.mir	…
regbankselect-amdgcn.image.load.1d.ll	[AMDGPU][GlobalISel] Fix waterfall loops	2021-10-28 10:30:55 +02:00
regbankselect-amdgcn.image.sample.1d.ll	[AMDGPU][GlobalISel] Fix waterfall loops	2021-10-28 10:30:55 +02:00
regbankselect-amdgcn.interp.mov.mir	…
regbankselect-amdgcn.interp.p1.f16.mir	…
regbankselect-amdgcn.interp.p1.mir	…
regbankselect-amdgcn.interp.p2.f16.mir	…
regbankselect-amdgcn.interp.p2.mir	…
regbankselect-amdgcn.kernarg.segment.ptr.mir	…
regbankselect-amdgcn.kill.mir	…
regbankselect-amdgcn.live.mask.mir	[AMDGPU] Add llvm.amdgcn.wqm.demote intrinsic	2021-02-15 08:45:46 +09:00
regbankselect-amdgcn.mfma.gfx90a.mir	[AMDGPU] gfx90a support	2021-02-17 16:01:32 -08:00
regbankselect-amdgcn.mfma.mir	…
regbankselect-amdgcn.ps.live.mir	…
regbankselect-amdgcn.raw.buffer.load.ll	[AMDGPU][GlobalISel] Fix waterfall loops	2021-10-28 10:30:55 +02:00
regbankselect-amdgcn.readfirstlane.mir	…
regbankselect-amdgcn.readlane.mir	AMDGPU/GlobalISel: Handle AGPRs used for SGPR operands.	2020-08-24 17:54:34 -04:00
regbankselect-amdgcn.s.buffer.load.ll	[AMDGPU][GlobalISel] Fix waterfall loops	2021-10-28 10:30:55 +02:00
regbankselect-amdgcn.s.buffer.load.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
regbankselect-amdgcn.s.get.waveid.in.workgroup.mir	…
regbankselect-amdgcn.s.getpc.mir	…
regbankselect-amdgcn.s.getreg.mir	…
regbankselect-amdgcn.s.memrealtime.mir	…
regbankselect-amdgcn.s.memtime.mir	…
regbankselect-amdgcn.s.sendmsg.mir	…
regbankselect-amdgcn.s.sendmsghalt.mir	…
regbankselect-amdgcn.struct.buffer.load.ll	[AMDGPU][GlobalISel] Fix waterfall loops	2021-10-28 10:30:55 +02:00
regbankselect-amdgcn.struct.buffer.store.ll	[AMDGPU][GlobalISel] Fix waterfall loops	2021-10-28 10:30:55 +02:00
regbankselect-amdgcn.update.dpp.mir	…
regbankselect-amdgcn.wqm.demote.mir	[AMDGPU] Add llvm.amdgcn.wqm.demote intrinsic	2021-02-15 08:45:46 +09:00
regbankselect-amdgcn.wqm.mir	…
regbankselect-amdgcn.wqm.vote.mir	…
regbankselect-amdgcn.writelane.mir	…
regbankselect-amdgcn.wwm.mir	[AMDGPU] Rename amdgcn_wwm to amdgcn_strict_wwm	2021-03-03 09:33:57 +01:00
regbankselect-amdgpu-ffbh-u32.mir	[AMDGPU][GlobalISel] Better legalization of 32-bit ctlz/cttz	2021-08-06 09:40:48 +01:00
regbankselect-amdgpu-ffbl-b32.mir	[AMDGPU][GlobalISel] Better legalization of 32-bit ctlz/cttz	2021-08-06 09:40:48 +01:00
regbankselect-and-s1.mir	…
regbankselect-and.mir	…
regbankselect-anyext.mir	AMDGPU/GlobalISel: Fix splitting 64-bit extensions	2020-05-20 11:13:32 -04:00
regbankselect-ashr.mir	[AMDGPU][GlobalISel] Fix v2s16 right shifts	2021-02-04 17:04:32 +00:00
regbankselect-atomic-cmpxchg.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
regbankselect-atomicrmw-add.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
regbankselect-atomicrmw-and.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
regbankselect-atomicrmw-fadd.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
regbankselect-atomicrmw-max.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
regbankselect-atomicrmw-min.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
regbankselect-atomicrmw-or.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
regbankselect-atomicrmw-sub.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
regbankselect-atomicrmw-umax.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
regbankselect-atomicrmw-umin.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
regbankselect-atomicrmw-xchg.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
regbankselect-atomicrmw-xor.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
regbankselect-bitcast.mir	GlobalISel: Verify G_BITCAST changes the type	2020-07-08 17:16:27 -04:00
regbankselect-bitreverse.mir	[AMDGPU] Better codegen for i64 bitreverse	2021-02-26 15:51:36 +00:00
regbankselect-block-addr.mir	…
regbankselect-brcond.mir	…
regbankselect-bswap.mir	…
regbankselect-build-vector-trunc.mir	…
regbankselect-build-vector-trunc.v2s16.mir	…
regbankselect-build-vector.mir	AMDGPU/GlobalISel: Fix missing 256-bit AGPR mapping	2020-08-17 09:53:26 -04:00
regbankselect-concat-vector.mir	AMDGPU/GlobalISel: Start trying to handle AGPR bank	2020-08-06 12:39:50 -04:00
regbankselect-constant.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
regbankselect-copy.mir	…
regbankselect-ctlz-zero-undef.mir	[AMDGPU][GlobalISel] Improve regbankselect for 64-bit VGPR ctlz_zero_undef/cttz_zero_undef	2021-08-06 09:40:48 +01:00
regbankselect-ctpop.mir	…
regbankselect-cttz-zero-undef.mir	[AMDGPU] Fix lowering of AMDGPU::G_CTTZ_ZERO_UNDEF to AMDGPU::G_AMDGPU_FFBL_B32	2021-08-17 18:09:57 +01:00
regbankselect-default.mir	AMDGPU/GlobalISel: re-auto-generate some test checks	2020-08-25 15:54:22 +01:00
regbankselect-dyn-stackalloc.mir	AMDGPU/GlobalISel: Handle uniform G_DYN_STACKALLOC	2020-06-03 19:56:07 -04:00
regbankselect-extract-vector-elt.mir	AMDGPU/GlobalISel: cmp/select method for extract element	2020-06-05 12:57:40 -07:00
regbankselect-extract.mir	AMDGPU/GlobalISel: Start trying to handle AGPR bank	2020-08-06 12:39:50 -04:00
regbankselect-fabs.mir	…
regbankselect-fadd.mir	…
regbankselect-fcanonicalize.mir	…
regbankselect-fceil.mir	…
regbankselect-fcmp.mir	…
regbankselect-fexp2.mir	…
regbankselect-flog2.mir	…
regbankselect-fma.mir	…
regbankselect-fmul.mir	…
regbankselect-fneg.mir	…
regbankselect-fpext.mir	…
regbankselect-fptosi.mir	…
regbankselect-fptoui.mir	…
regbankselect-fptrunc.mir	…
regbankselect-frame-index.mir	…
regbankselect-freeze.mir	AMDGPU/GlobalISel: Select G_FREEZE	2020-07-16 11:10:48 +02:00
regbankselect-frint.mir	…
regbankselect-fshr.mir	…
regbankselect-fsqrt.mir	…
regbankselect-fsub.mir	…
regbankselect-icmp.mir	…
regbankselect-icmp.s16.mir	…
regbankselect-illegal-copy.mir	…
regbankselect-insert-vector-elt.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
regbankselect-insert.mir	AMDGPU/GlobalISel: Start trying to handle AGPR bank	2020-08-06 12:39:50 -04:00
regbankselect-intrinsic-trunc.mir	…
regbankselect-inttoptr.mir	…
regbankselect-load.mir	GlobalISel: Preserve memory type when reducing load/store width	2021-06-30 17:05:29 -04:00
regbankselect-lshr.mir	[AMDGPU][GlobalISel] Fix v2s16 right shifts	2021-02-04 17:04:32 +00:00
regbankselect-merge-values.mir	AMDGPU/GlobalISel: Start trying to handle AGPR bank	2020-08-06 12:39:50 -04:00
regbankselect-mul.mir	…
regbankselect-or.mir	…
regbankselect-phi-s1.mir	…
regbankselect-phi.mir	AMDGPU/GlobalISel: Start trying to handle AGPR bank	2020-08-06 12:39:50 -04:00
regbankselect-ptr-add.mir	…
regbankselect-ptrmask.mir	GlobalISel: Merge G_PTR_MASK with llvm.ptrmask intrinsic	2020-05-26 11:48:13 -04:00
regbankselect-ptrtoint.mir	…
regbankselect-reg-sequence.mir	…
regbankselect-sadde.mir	…
regbankselect-sbfx.mir	[AMDGPU][GlobalISel] Legalize and select G_SBFX and G_UBFX	2021-06-28 09:06:44 -04:00
regbankselect-select.mir	…
regbankselect-sext-inreg.mir	…
regbankselect-sext.mir	…
regbankselect-sextload.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
regbankselect-shl.mir	…
regbankselect-shuffle-vector.mir	…
regbankselect-sitofp.mir	…
regbankselect-smax.mir	[AMDGPU][GlobalISel] Use scalar min/max instructions	2021-02-04 17:04:32 +00:00
regbankselect-smin.mir	[AMDGPU][GlobalISel] Use scalar min/max instructions	2021-02-04 17:04:32 +00:00
regbankselect-smulh.mir	…
regbankselect-split-scalar-load-metadata.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
regbankselect-ssube.mir	…
regbankselect-sub.mir	…
regbankselect-trunc.mir	…
regbankselect-uadde.mir	…
regbankselect-uaddo.mir	…
regbankselect-ubfx.mir	[AMDGPU][GlobalISel] Legalize and select G_SBFX and G_UBFX	2021-06-28 09:06:44 -04:00
regbankselect-uitofp.mir	…
regbankselect-umax.mir	[AMDGPU][GlobalISel] Use scalar min/max instructions	2021-02-04 17:04:32 +00:00
regbankselect-umin.mir	[AMDGPU][GlobalISel] Use scalar min/max instructions	2021-02-04 17:04:32 +00:00
regbankselect-umulh.mir	…
regbankselect-uniform-load-noclobber.mir	GlobalISel: Preserve memory type when reducing load/store width	2021-06-30 17:05:29 -04:00
regbankselect-unmerge-values.mir	AMDGPU/GlobalISel: Start trying to handle AGPR bank	2020-08-06 12:39:50 -04:00
regbankselect-usube.mir	…
regbankselect-usubo.mir	…
regbankselect-waterfall-agpr.mir	[AMDGPU][GlobalISel] Fix waterfall loops	2021-10-28 10:30:55 +02:00
regbankselect-widen-scalar-loads.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
regbankselect-xor.mir	…
regbankselect-zext.mir	AMDGPU/GlobalISel: Fix splitting 64-bit extensions	2020-05-20 11:13:32 -04:00
regbankselect-zextload.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
regbankselect.mir	CodeGen: Print/parse LLTs in MachineMemOperands	2021-06-30 16:54:13 -04:00
ret.ll	…
roundeven.ll	[GlobalISel] Combine fabs(fneg(x)) to fabs(x)	2021-10-05 13:43:39 +02:00
saddsat.ll	[AMDGPU] Switch PostRA sched to MachineSched	2021-09-14 15:11:27 -04:00
sbfx.ll	[AMDGPU][GlobalISel] Legalize and select G_SBFX and G_UBFX	2021-06-28 09:06:44 -04:00
sdiv.i32.ll	[GlobalISel] Constant fold G_SITOFP and G_UITOFP in CSEMIRBuilder	2021-07-27 11:27:58 +01:00
sdiv.i64.ll	[AMDGPU] Do not generate ELF symbols for the local branch target labels	2021-11-20 10:32:41 +05:30
sdivrem.ll	[AMDGPU] Simplify 64-bit division/remainder expansion	2021-11-12 15:48:41 +00:00
shader-epilogs.ll	…
shl-ext-reduce.ll	[AMDGPU] Switch PostRA sched to MachineSched	2021-09-14 15:11:27 -04:00
shl.ll	[AMDGPU] Check for unneeded shift mask in shift PatFrags.	2021-11-24 10:53:12 +05:30
shlN_add.ll	[AMDGPU] Extend gfx10 test coverage. NFC.	2021-03-29 11:13:55 +02:00
smed3.ll	AMDGPU/GlobalISel: Fix constant bus restriction errors for med3	2021-12-01 21:36:37 +01:00
smrd.ll	[NFC] Removed unused prefixes in CodeGen/AMDGPU/GlobalISel	2021-01-05 12:57:17 -08:00
srem.i32.ll	[GlobalISel] Constant fold G_SITOFP and G_UITOFP in CSEMIRBuilder	2021-07-27 11:27:58 +01:00
srem.i64.ll	[AMDGPU] Do not generate ELF symbols for the local branch target labels	2021-11-20 10:32:41 +05:30
ssubsat.ll	[AMDGPU] Switch PostRA sched to MachineSched	2021-09-14 15:11:27 -04:00
store-local.96.ll	[AMDGPU] Switch PostRA sched to MachineSched	2021-09-14 15:11:27 -04:00
store-local.128.ll	[AMDGPU] Switch PostRA sched to MachineSched	2021-09-14 15:11:27 -04:00
trunc.ll	…
uaddsat.ll	[AMDGPU] Switch PostRA sched to MachineSched	2021-09-14 15:11:27 -04:00
ubfx.ll	[AMDGPU][GlobalISel] Legalize and select G_SBFX and G_UBFX	2021-06-28 09:06:44 -04:00
udiv.i32.ll	[GlobalISel] Combine G_UMULH x, (1 << c)) -> x >> (bitwidth - c)	2021-10-07 23:51:37 -07:00
udiv.i64.ll	[AMDGPU] Do not generate ELF symbols for the local branch target labels	2021-11-20 10:32:41 +05:30
udivrem.ll	[AMDGPU] Simplify 64-bit division/remainder expansion	2021-11-12 15:48:41 +00:00
umed3.ll	AMDGPU/GlobalISel: Fix constant bus restriction errors for med3	2021-12-01 21:36:37 +01:00
urem.i32.ll	[GlobalISel] Constant fold G_SITOFP and G_UITOFP in CSEMIRBuilder	2021-07-27 11:27:58 +01:00
urem.i64.ll	[AMDGPU] Do not generate ELF symbols for the local branch target labels	2021-11-20 10:32:41 +05:30
usubsat.ll	[AMDGPU] Switch PostRA sched to MachineSched	2021-09-14 15:11:27 -04:00
widen-i8-i16-scalar-loads.ll	[AMDGPU][GlobalISel] Widen 1 and 2 byte scalar loads	2021-05-05 15:18:19 -07:00
write_register.ll	…
xnor.ll	[GlobalISel][Legalizer] Use ArtifactValueFinder first for unmerge combines before trying others.	2021-09-21 00:02:15 -07:00
zextload.ll	[AMDGPU] Extend gfx10 test coverage. NFC.	2021-03-29 11:13:55 +02:00