forked from OSchip/llvm-project
38 lines
1.6 KiB
LLVM
38 lines
1.6 KiB
LLVM
; RUN: llc -march=amdgcn < %s | FileCheck -check-prefix=GCN %s
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@array = external addrspace(4) constant [32 x [800 x i32]], align 4
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; GCN-LABEL: {{^}}test_lsr_voidty:
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define amdgpu_kernel void @test_lsr_voidty() {
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entry:
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br label %for.body
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for.body: ; preds = %for.body.i, %entry
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br label %for.body.i
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for.body.i: ; preds = %for.body.i, %for.body
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%ij = phi i32 [ 0, %for.body ], [ %inc14, %for.body.i ]
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%tmp = load i32, i32 addrspace(5)* undef, align 4
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%inc13 = or i32 %ij, 2
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%shl = shl i32 1, 0
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%and = and i32 %shl, %tmp
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%tobool = icmp eq i32 %and, 0
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%add = mul nuw nsw i32 %inc13, 5
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%tmp1 = zext i32 %add to i64
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%arrayidx8 = getelementptr inbounds [32 x [800 x i32]], [32 x [800 x i32]] addrspace(4)* @array, i64 0, i64 undef, i64 %tmp1
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%tmp2 = load i32, i32 addrspace(4)* %arrayidx8, align 4
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%and9 = select i1 %tobool, i32 0, i32 %tmp2
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%xor = xor i32 undef, %and9
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%inc1 = or i32 %ij, 3
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%add2 = mul nuw nsw i32 %inc1, 5
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%add6 = add nuw nsw i32 %add2, 1
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%tmp3 = zext i32 %add6 to i64
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%arrayidx9 = getelementptr inbounds [32 x [800 x i32]], [32 x [800 x i32]] addrspace(4)* @array, i64 0, i64 undef, i64 %tmp3
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%tmp4 = bitcast i32 addrspace(4)* %arrayidx9 to <4 x i32> addrspace(4)*
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%tmp5 = load <4 x i32>, <4 x i32> addrspace(4)* %tmp4, align 4
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%reorder_shuffle2 = shufflevector <4 x i32> %tmp5, <4 x i32> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
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%tmp6 = select <4 x i1> undef, <4 x i32> zeroinitializer, <4 x i32> %reorder_shuffle2
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%inc14 = add nuw nsw i32 %ij, 4
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br i1 undef, label %for.body, label %for.body.i
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}
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