forked from OSchip/llvm-project
139 lines
3.9 KiB
LLVM
139 lines
3.9 KiB
LLVM
; Test v4i32 absolute.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
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; Test with slt.
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define <4 x i32> @f1(<4 x i32> %val) {
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; CHECK-LABEL: f1:
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; CHECK: vlpf %v24, %v24
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; CHECK: br %r14
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%cmp = icmp slt <4 x i32> %val, zeroinitializer
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%neg = sub <4 x i32> zeroinitializer, %val
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%ret = select <4 x i1> %cmp, <4 x i32> %neg, <4 x i32> %val
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ret <4 x i32> %ret
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}
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; Test with sle.
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define <4 x i32> @f2(<4 x i32> %val) {
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; CHECK-LABEL: f2:
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; CHECK: vlpf %v24, %v24
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; CHECK: br %r14
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%cmp = icmp sle <4 x i32> %val, zeroinitializer
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%neg = sub <4 x i32> zeroinitializer, %val
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%ret = select <4 x i1> %cmp, <4 x i32> %neg, <4 x i32> %val
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ret <4 x i32> %ret
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}
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; Test with sgt.
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define <4 x i32> @f3(<4 x i32> %val) {
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; CHECK-LABEL: f3:
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; CHECK: vlpf %v24, %v24
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; CHECK: br %r14
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%cmp = icmp sgt <4 x i32> %val, zeroinitializer
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%neg = sub <4 x i32> zeroinitializer, %val
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%ret = select <4 x i1> %cmp, <4 x i32> %val, <4 x i32> %neg
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ret <4 x i32> %ret
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}
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; Test with sge.
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define <4 x i32> @f4(<4 x i32> %val) {
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; CHECK-LABEL: f4:
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; CHECK: vlpf %v24, %v24
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; CHECK: br %r14
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%cmp = icmp sge <4 x i32> %val, zeroinitializer
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%neg = sub <4 x i32> zeroinitializer, %val
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%ret = select <4 x i1> %cmp, <4 x i32> %val, <4 x i32> %neg
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ret <4 x i32> %ret
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}
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; Test that negative absolute uses VLPF too. There is no vector equivalent
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; of LOAD NEGATIVE.
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define <4 x i32> @f5(<4 x i32> %val) {
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; CHECK-LABEL: f5:
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; CHECK: vlpf [[REG:%v[0-9]+]], %v24
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; CHECK: vlcf %v24, [[REG]]
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; CHECK: br %r14
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%cmp = icmp slt <4 x i32> %val, zeroinitializer
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%neg = sub <4 x i32> zeroinitializer, %val
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%abs = select <4 x i1> %cmp, <4 x i32> %neg, <4 x i32> %val
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%ret = sub <4 x i32> zeroinitializer, %abs
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ret <4 x i32> %ret
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}
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; Try another form of negative absolute (slt version).
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define <4 x i32> @f6(<4 x i32> %val) {
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; CHECK-LABEL: f6:
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; CHECK: vlpf [[REG:%v[0-9]+]], %v24
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; CHECK: vlcf %v24, [[REG]]
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; CHECK: br %r14
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%cmp = icmp slt <4 x i32> %val, zeroinitializer
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%neg = sub <4 x i32> zeroinitializer, %val
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%ret = select <4 x i1> %cmp, <4 x i32> %val, <4 x i32> %neg
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ret <4 x i32> %ret
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}
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; Test with sle.
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define <4 x i32> @f7(<4 x i32> %val) {
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; CHECK-LABEL: f7:
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; CHECK: vlpf [[REG:%v[0-9]+]], %v24
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; CHECK: vlcf %v24, [[REG]]
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; CHECK: br %r14
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%cmp = icmp sle <4 x i32> %val, zeroinitializer
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%neg = sub <4 x i32> zeroinitializer, %val
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%ret = select <4 x i1> %cmp, <4 x i32> %val, <4 x i32> %neg
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ret <4 x i32> %ret
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}
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; Test with sgt.
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define <4 x i32> @f8(<4 x i32> %val) {
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; CHECK-LABEL: f8:
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; CHECK: vlpf [[REG:%v[0-9]+]], %v24
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; CHECK: vlcf %v24, [[REG]]
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; CHECK: br %r14
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%cmp = icmp sgt <4 x i32> %val, zeroinitializer
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%neg = sub <4 x i32> zeroinitializer, %val
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%ret = select <4 x i1> %cmp, <4 x i32> %neg, <4 x i32> %val
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ret <4 x i32> %ret
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}
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; Test with sge.
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define <4 x i32> @f9(<4 x i32> %val) {
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; CHECK-LABEL: f9:
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; CHECK: vlpf [[REG:%v[0-9]+]], %v24
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; CHECK: vlcf %v24, [[REG]]
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; CHECK: br %r14
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%cmp = icmp sge <4 x i32> %val, zeroinitializer
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%neg = sub <4 x i32> zeroinitializer, %val
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%ret = select <4 x i1> %cmp, <4 x i32> %neg, <4 x i32> %val
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ret <4 x i32> %ret
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}
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; Test with an SRA-based boolean vector.
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define <4 x i32> @f10(<4 x i32> %val) {
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; CHECK-LABEL: f10:
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; CHECK: vlpf %v24, %v24
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; CHECK: br %r14
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%shr = ashr <4 x i32> %val, <i32 31, i32 31, i32 31, i32 31>
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%neg = sub <4 x i32> zeroinitializer, %val
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%and1 = and <4 x i32> %shr, %neg
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%not = xor <4 x i32> %shr, <i32 -1, i32 -1, i32 -1, i32 -1>
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%and2 = and <4 x i32> %not, %val
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%ret = or <4 x i32> %and1, %and2
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ret <4 x i32> %ret
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}
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; ...and again in reverse
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define <4 x i32> @f11(<4 x i32> %val) {
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; CHECK-LABEL: f11:
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; CHECK: vlpf [[REG:%v[0-9]+]], %v24
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; CHECK: vlcf %v24, [[REG]]
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; CHECK: br %r14
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%shr = ashr <4 x i32> %val, <i32 31, i32 31, i32 31, i32 31>
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%and1 = and <4 x i32> %shr, %val
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%not = xor <4 x i32> %shr, <i32 -1, i32 -1, i32 -1, i32 -1>
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%neg = sub <4 x i32> zeroinitializer, %val
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%and2 = and <4 x i32> %not, %neg
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%ret = or <4 x i32> %and1, %and2
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ret <4 x i32> %ret
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}
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