maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity
llvm-project/llvm/test/CodeGen
History
Krzysztof Parzyszek 7691790dfd [Hexagon] Improve casting of boolean HVX vectors to scalars 
- Mark memory access for bool vectors as disallowed in target lowering.
  This will prevent combining bitcasts of bool vectors with stores.
- Replace the actual bitcasting code with a faster version.
- Handle casting of v16i1 to i16.
 		2020-02-26 12:46:52 -06:00
..
AArch64 [DAGCombiner] avoid narrowing fake fneg vector op 2020-02-26 11:25:56 -05:00
AMDGPU AMDGPU: Fix some more incorrect check lines 2020-02-26 14:37:22 +00:00
ARC
…
ARM Don't generate libcalls for wide shift on Windows ARM (PR42711) 2020-02-25 11:54:07 +01:00
AVR
…
BPF Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
Generic Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
Hexagon [Hexagon] Improve casting of boolean HVX vectors to scalars 2020-02-26 12:46:52 -06:00
Inputs
…
Lanai Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
MIR [MIR][ARM] MachineOperand comments 2020-02-24 14:19:21 +00:00
MSP430
…
Mips [MIPS GlobalISel] Legalize non-power-of-2 and unaligned load and store 2020-02-19 12:02:27 +01:00
NVPTX [NVPTX, LSV] Move the LSV optimization pass to later when the graph is cleaner 2020-02-13 12:15:38 -08:00
PowerPC [PowerPC][NFC] Convert grep usage to FileCheck in lit test. 2020-02-26 12:28:18 -05:00
RISCV [RISCV] Implement mayBeEmittedAsTailCall for tail call optimization 2020-02-18 23:56:42 +08:00
SPARC Emit register names in cfi assembly directives 2020-02-25 14:00:01 -05:00
SystemZ [LegalizeTypes] Scalarize non-byte sized loads in WidenRecRes_Load and SplitVecResLoad 2020-02-24 15:14:33 -08:00
Thumb [MIR][ARM] MachineOperand comments 2020-02-24 14:19:21 +00:00
Thumb2 [ARM,MVE] Add predicated intrinsics for many unary functions. 2020-02-26 15:12:07 +00:00
VE [VE] TLS codegen 2020-02-18 16:09:12 +01:00
WebAssembly [WebAssembly] Simplify extract_vector lowering 2020-02-25 13:54:48 -08:00
WinCFGuard
…
WinEH
…
X86 [DAG] visitRotate - modulo non-uniform constant rotation amounts 2020-02-26 15:43:12 +00:00
XCore [XCore] Add instruction pattern for bitrev 2020-02-21 09:28:49 +08:00