forked from OSchip/llvm-project
616 lines
18 KiB
LLVM
616 lines
18 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse4.1 | FileCheck %s --check-prefixes=ALL,SSE
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefixes=ALL,AVX,AVX1
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=ALL,AVX,AVX2
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define <16 x i8> @arg_i8_v16i8(i8 %x, i32 %y) nounwind {
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; SSE-LABEL: arg_i8_v16i8:
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; SSE: # %bb.0:
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; SSE-NEXT: movd %edi, %xmm0
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; SSE-NEXT: pxor %xmm1, %xmm1
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; SSE-NEXT: pshufb %xmm1, %xmm0
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; SSE-NEXT: retq
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;
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; AVX1-LABEL: arg_i8_v16i8:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vmovd %edi, %xmm0
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; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
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; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm0
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: arg_i8_v16i8:
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; AVX2: # %bb.0:
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; AVX2-NEXT: vmovd %edi, %xmm0
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; AVX2-NEXT: vpbroadcastb %xmm0, %xmm0
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; AVX2-NEXT: retq
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%ins = insertelement <16 x i8> undef, i8 %x, i32 %y
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ret <16 x i8> %ins
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}
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define <8 x i16> @arg_i16_v8i16(i16 %x, i32 %y) nounwind {
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; SSE-LABEL: arg_i16_v8i16:
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; SSE: # %bb.0:
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; SSE-NEXT: movd %edi, %xmm0
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; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,0,2,3,4,5,6,7]
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; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
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; SSE-NEXT: retq
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;
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; AVX1-LABEL: arg_i16_v8i16:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vmovd %edi, %xmm0
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; AVX1-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,0,2,3,4,5,6,7]
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; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: arg_i16_v8i16:
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; AVX2: # %bb.0:
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; AVX2-NEXT: vmovd %edi, %xmm0
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; AVX2-NEXT: vpbroadcastw %xmm0, %xmm0
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; AVX2-NEXT: retq
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%ins = insertelement <8 x i16> undef, i16 %x, i32 %y
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ret <8 x i16> %ins
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}
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define <4 x i32> @arg_i32_v4i32(i32 %x, i32 %y) nounwind {
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; SSE-LABEL: arg_i32_v4i32:
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; SSE: # %bb.0:
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; SSE-NEXT: movd %edi, %xmm0
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; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
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; SSE-NEXT: retq
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;
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; AVX1-LABEL: arg_i32_v4i32:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vmovd %edi, %xmm0
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; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: arg_i32_v4i32:
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; AVX2: # %bb.0:
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; AVX2-NEXT: vmovd %edi, %xmm0
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; AVX2-NEXT: vpbroadcastd %xmm0, %xmm0
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; AVX2-NEXT: retq
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%ins = insertelement <4 x i32> undef, i32 %x, i32 %y
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ret <4 x i32> %ins
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}
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define <2 x i64> @arg_i64_v2i64(i64 %x, i32 %y) nounwind {
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; SSE-LABEL: arg_i64_v2i64:
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; SSE: # %bb.0:
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; SSE-NEXT: movq %rdi, %xmm0
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; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
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; SSE-NEXT: retq
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;
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; AVX1-LABEL: arg_i64_v2i64:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vmovq %rdi, %xmm0
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; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: arg_i64_v2i64:
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; AVX2: # %bb.0:
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; AVX2-NEXT: vmovq %rdi, %xmm0
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; AVX2-NEXT: vpbroadcastq %xmm0, %xmm0
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; AVX2-NEXT: retq
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%ins = insertelement <2 x i64> undef, i64 %x, i32 %y
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ret <2 x i64> %ins
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}
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define <4 x float> @arg_f32_v4f32(float %x, i32 %y) nounwind {
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; SSE-LABEL: arg_f32_v4f32:
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; SSE: # %bb.0:
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; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,0,0]
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; SSE-NEXT: retq
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;
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; AVX1-LABEL: arg_f32_v4f32:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,0,0]
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: arg_f32_v4f32:
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; AVX2: # %bb.0:
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; AVX2-NEXT: vbroadcastss %xmm0, %xmm0
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; AVX2-NEXT: retq
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%ins = insertelement <4 x float> undef, float %x, i32 %y
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ret <4 x float> %ins
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}
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define <2 x double> @arg_f64_v2f64(double %x, i32 %y) nounwind {
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; SSE-LABEL: arg_f64_v2f64:
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; SSE: # %bb.0:
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; SSE-NEXT: movddup {{.*#+}} xmm0 = xmm0[0,0]
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; SSE-NEXT: retq
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;
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; AVX-LABEL: arg_f64_v2f64:
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; AVX: # %bb.0:
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; AVX-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
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; AVX-NEXT: retq
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%ins = insertelement <2 x double> undef, double %x, i32 %y
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ret <2 x double> %ins
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}
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define <16 x i8> @load_i8_v16i8(i8* %p, i32 %y) nounwind {
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; SSE-LABEL: load_i8_v16i8:
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; SSE: # %bb.0:
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; SSE-NEXT: movzbl (%rdi), %eax
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; SSE-NEXT: movd %eax, %xmm0
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; SSE-NEXT: pxor %xmm1, %xmm1
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; SSE-NEXT: pshufb %xmm1, %xmm0
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; SSE-NEXT: retq
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;
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; AVX1-LABEL: load_i8_v16i8:
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; AVX1: # %bb.0:
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; AVX1-NEXT: movzbl (%rdi), %eax
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; AVX1-NEXT: vmovd %eax, %xmm0
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; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
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; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm0
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: load_i8_v16i8:
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; AVX2: # %bb.0:
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; AVX2-NEXT: vpbroadcastb (%rdi), %xmm0
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; AVX2-NEXT: retq
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%x = load i8, i8* %p
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%ins = insertelement <16 x i8> undef, i8 %x, i32 %y
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ret <16 x i8> %ins
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}
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define <8 x i16> @load_i16_v8i16(i16* %p, i32 %y) nounwind {
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; SSE-LABEL: load_i16_v8i16:
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; SSE: # %bb.0:
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; SSE-NEXT: movzwl (%rdi), %eax
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; SSE-NEXT: movd %eax, %xmm0
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; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,0,2,3,4,5,6,7]
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; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
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; SSE-NEXT: retq
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;
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; AVX1-LABEL: load_i16_v8i16:
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; AVX1: # %bb.0:
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; AVX1-NEXT: movzwl (%rdi), %eax
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; AVX1-NEXT: vmovd %eax, %xmm0
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; AVX1-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,0,2,3,4,5,6,7]
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; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: load_i16_v8i16:
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; AVX2: # %bb.0:
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; AVX2-NEXT: vpbroadcastw (%rdi), %xmm0
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; AVX2-NEXT: retq
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%x = load i16, i16* %p
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%ins = insertelement <8 x i16> undef, i16 %x, i32 %y
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ret <8 x i16> %ins
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}
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define <4 x i32> @load_i32_v4i32(i32* %p, i32 %y) nounwind {
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; SSE-LABEL: load_i32_v4i32:
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; SSE: # %bb.0:
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; SSE-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
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; SSE-NEXT: retq
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;
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; AVX-LABEL: load_i32_v4i32:
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; AVX: # %bb.0:
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; AVX-NEXT: vbroadcastss (%rdi), %xmm0
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; AVX-NEXT: retq
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%x = load i32, i32* %p
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%ins = insertelement <4 x i32> undef, i32 %x, i32 %y
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ret <4 x i32> %ins
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}
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define <2 x i64> @load_i64_v2i64(i64* %p, i32 %y) nounwind {
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; SSE-LABEL: load_i64_v2i64:
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; SSE: # %bb.0:
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; SSE-NEXT: movq {{.*#+}} xmm0 = mem[0],zero
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; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
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; SSE-NEXT: retq
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;
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; AVX1-LABEL: load_i64_v2i64:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
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; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,1,0,1]
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: load_i64_v2i64:
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; AVX2: # %bb.0:
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; AVX2-NEXT: vpbroadcastq (%rdi), %xmm0
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; AVX2-NEXT: retq
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%x = load i64, i64* %p
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%ins = insertelement <2 x i64> undef, i64 %x, i32 %y
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ret <2 x i64> %ins
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}
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define <4 x float> @load_f32_v4f32(float* %p, i32 %y) nounwind {
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; SSE-LABEL: load_f32_v4f32:
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; SSE: # %bb.0:
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; SSE-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,0,0]
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; SSE-NEXT: retq
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;
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; AVX-LABEL: load_f32_v4f32:
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; AVX: # %bb.0:
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; AVX-NEXT: vbroadcastss (%rdi), %xmm0
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; AVX-NEXT: retq
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%x = load float, float* %p
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%ins = insertelement <4 x float> undef, float %x, i32 %y
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ret <4 x float> %ins
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}
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define <2 x double> @load_f64_v2f64(double* %p, i32 %y) nounwind {
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; SSE-LABEL: load_f64_v2f64:
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; SSE: # %bb.0:
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; SSE-NEXT: movddup {{.*#+}} xmm0 = mem[0,0]
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; SSE-NEXT: retq
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;
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; AVX-LABEL: load_f64_v2f64:
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; AVX: # %bb.0:
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; AVX-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0]
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; AVX-NEXT: retq
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%x = load double, double* %p
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%ins = insertelement <2 x double> undef, double %x, i32 %y
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ret <2 x double> %ins
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}
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define <32 x i8> @arg_i8_v32i8(i8 %x, i32 %y) nounwind {
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; SSE-LABEL: arg_i8_v32i8:
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; SSE: # %bb.0:
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; SSE-NEXT: pushq %rbp
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; SSE-NEXT: movq %rsp, %rbp
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; SSE-NEXT: andq $-32, %rsp
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; SSE-NEXT: subq $64, %rsp
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; SSE-NEXT: # kill: def $esi killed $esi def $rsi
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; SSE-NEXT: andl $31, %esi
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; SSE-NEXT: movb %dil, (%rsp,%rsi)
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; SSE-NEXT: movaps (%rsp), %xmm0
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; SSE-NEXT: movaps {{[0-9]+}}(%rsp), %xmm1
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; SSE-NEXT: movq %rbp, %rsp
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; SSE-NEXT: popq %rbp
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; SSE-NEXT: retq
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;
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; AVX1-LABEL: arg_i8_v32i8:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vmovd %edi, %xmm0
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; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
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; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm0
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; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: arg_i8_v32i8:
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; AVX2: # %bb.0:
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; AVX2-NEXT: vmovd %edi, %xmm0
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; AVX2-NEXT: vpbroadcastb %xmm0, %ymm0
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; AVX2-NEXT: retq
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%ins = insertelement <32 x i8> undef, i8 %x, i32 %y
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ret <32 x i8> %ins
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}
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define <16 x i16> @arg_i16_v16i16(i16 %x, i32 %y) nounwind {
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; SSE-LABEL: arg_i16_v16i16:
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; SSE: # %bb.0:
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; SSE-NEXT: pushq %rbp
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; SSE-NEXT: movq %rsp, %rbp
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; SSE-NEXT: andq $-32, %rsp
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; SSE-NEXT: subq $64, %rsp
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; SSE-NEXT: # kill: def $esi killed $esi def $rsi
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; SSE-NEXT: andl $15, %esi
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; SSE-NEXT: movw %di, (%rsp,%rsi,2)
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; SSE-NEXT: movaps (%rsp), %xmm0
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; SSE-NEXT: movaps {{[0-9]+}}(%rsp), %xmm1
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; SSE-NEXT: movq %rbp, %rsp
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; SSE-NEXT: popq %rbp
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; SSE-NEXT: retq
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;
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; AVX1-LABEL: arg_i16_v16i16:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vmovd %edi, %xmm0
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; AVX1-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,0,2,3,4,5,6,7]
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; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
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; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: arg_i16_v16i16:
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; AVX2: # %bb.0:
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; AVX2-NEXT: vmovd %edi, %xmm0
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; AVX2-NEXT: vpbroadcastw %xmm0, %ymm0
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; AVX2-NEXT: retq
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%ins = insertelement <16 x i16> undef, i16 %x, i32 %y
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ret <16 x i16> %ins
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}
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define <8 x i32> @arg_i32_v8i32(i32 %x, i32 %y) nounwind {
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; SSE-LABEL: arg_i32_v8i32:
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; SSE: # %bb.0:
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; SSE-NEXT: pushq %rbp
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; SSE-NEXT: movq %rsp, %rbp
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; SSE-NEXT: andq $-32, %rsp
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; SSE-NEXT: subq $64, %rsp
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; SSE-NEXT: # kill: def $esi killed $esi def $rsi
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; SSE-NEXT: andl $7, %esi
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; SSE-NEXT: movl %edi, (%rsp,%rsi,4)
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; SSE-NEXT: movaps (%rsp), %xmm0
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; SSE-NEXT: movaps {{[0-9]+}}(%rsp), %xmm1
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; SSE-NEXT: movq %rbp, %rsp
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; SSE-NEXT: popq %rbp
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; SSE-NEXT: retq
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;
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; AVX1-LABEL: arg_i32_v8i32:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vmovd %edi, %xmm0
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; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
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; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: arg_i32_v8i32:
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; AVX2: # %bb.0:
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; AVX2-NEXT: vmovd %edi, %xmm0
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; AVX2-NEXT: vpbroadcastd %xmm0, %ymm0
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; AVX2-NEXT: retq
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%ins = insertelement <8 x i32> undef, i32 %x, i32 %y
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ret <8 x i32> %ins
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}
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define <4 x i64> @arg_i64_v4i64(i64 %x, i32 %y) nounwind {
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; SSE-LABEL: arg_i64_v4i64:
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; SSE: # %bb.0:
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; SSE-NEXT: pushq %rbp
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; SSE-NEXT: movq %rsp, %rbp
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; SSE-NEXT: andq $-32, %rsp
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; SSE-NEXT: subq $64, %rsp
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; SSE-NEXT: # kill: def $esi killed $esi def $rsi
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; SSE-NEXT: andl $3, %esi
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; SSE-NEXT: movq %rdi, (%rsp,%rsi,8)
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; SSE-NEXT: movaps (%rsp), %xmm0
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; SSE-NEXT: movaps {{[0-9]+}}(%rsp), %xmm1
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; SSE-NEXT: movq %rbp, %rsp
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; SSE-NEXT: popq %rbp
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|
; SSE-NEXT: retq
|
|
;
|
|
; AVX1-LABEL: arg_i64_v4i64:
|
|
; AVX1: # %bb.0:
|
|
; AVX1-NEXT: vmovq %rdi, %xmm0
|
|
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
|
|
; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
|
|
; AVX1-NEXT: retq
|
|
;
|
|
; AVX2-LABEL: arg_i64_v4i64:
|
|
; AVX2: # %bb.0:
|
|
; AVX2-NEXT: vmovq %rdi, %xmm0
|
|
; AVX2-NEXT: vpbroadcastq %xmm0, %ymm0
|
|
; AVX2-NEXT: retq
|
|
%ins = insertelement <4 x i64> undef, i64 %x, i32 %y
|
|
ret <4 x i64> %ins
|
|
}
|
|
|
|
define <8 x float> @arg_f32_v8f32(float %x, i32 %y) nounwind {
|
|
; SSE-LABEL: arg_f32_v8f32:
|
|
; SSE: # %bb.0:
|
|
; SSE-NEXT: pushq %rbp
|
|
; SSE-NEXT: movq %rsp, %rbp
|
|
; SSE-NEXT: andq $-32, %rsp
|
|
; SSE-NEXT: subq $64, %rsp
|
|
; SSE-NEXT: # kill: def $edi killed $edi def $rdi
|
|
; SSE-NEXT: andl $7, %edi
|
|
; SSE-NEXT: movss %xmm0, (%rsp,%rdi,4)
|
|
; SSE-NEXT: movaps (%rsp), %xmm0
|
|
; SSE-NEXT: movaps {{[0-9]+}}(%rsp), %xmm1
|
|
; SSE-NEXT: movq %rbp, %rsp
|
|
; SSE-NEXT: popq %rbp
|
|
; SSE-NEXT: retq
|
|
;
|
|
; AVX1-LABEL: arg_f32_v8f32:
|
|
; AVX1: # %bb.0:
|
|
; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,0,0]
|
|
; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
|
|
; AVX1-NEXT: retq
|
|
;
|
|
; AVX2-LABEL: arg_f32_v8f32:
|
|
; AVX2: # %bb.0:
|
|
; AVX2-NEXT: vbroadcastss %xmm0, %ymm0
|
|
; AVX2-NEXT: retq
|
|
%ins = insertelement <8 x float> undef, float %x, i32 %y
|
|
ret <8 x float> %ins
|
|
}
|
|
|
|
define <4 x double> @arg_f64_v4f64(double %x, i32 %y) nounwind {
|
|
; SSE-LABEL: arg_f64_v4f64:
|
|
; SSE: # %bb.0:
|
|
; SSE-NEXT: pushq %rbp
|
|
; SSE-NEXT: movq %rsp, %rbp
|
|
; SSE-NEXT: andq $-32, %rsp
|
|
; SSE-NEXT: subq $64, %rsp
|
|
; SSE-NEXT: # kill: def $edi killed $edi def $rdi
|
|
; SSE-NEXT: andl $3, %edi
|
|
; SSE-NEXT: movsd %xmm0, (%rsp,%rdi,8)
|
|
; SSE-NEXT: movaps (%rsp), %xmm0
|
|
; SSE-NEXT: movaps {{[0-9]+}}(%rsp), %xmm1
|
|
; SSE-NEXT: movq %rbp, %rsp
|
|
; SSE-NEXT: popq %rbp
|
|
; SSE-NEXT: retq
|
|
;
|
|
; AVX1-LABEL: arg_f64_v4f64:
|
|
; AVX1: # %bb.0:
|
|
; AVX1-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
|
|
; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
|
|
; AVX1-NEXT: retq
|
|
;
|
|
; AVX2-LABEL: arg_f64_v4f64:
|
|
; AVX2: # %bb.0:
|
|
; AVX2-NEXT: vbroadcastsd %xmm0, %ymm0
|
|
; AVX2-NEXT: retq
|
|
%ins = insertelement <4 x double> undef, double %x, i32 %y
|
|
ret <4 x double> %ins
|
|
}
|
|
|
|
define <32 x i8> @load_i8_v32i8(i8* %p, i32 %y) nounwind {
|
|
; SSE-LABEL: load_i8_v32i8:
|
|
; SSE: # %bb.0:
|
|
; SSE-NEXT: pushq %rbp
|
|
; SSE-NEXT: movq %rsp, %rbp
|
|
; SSE-NEXT: andq $-32, %rsp
|
|
; SSE-NEXT: subq $64, %rsp
|
|
; SSE-NEXT: # kill: def $esi killed $esi def $rsi
|
|
; SSE-NEXT: movb (%rdi), %al
|
|
; SSE-NEXT: andl $31, %esi
|
|
; SSE-NEXT: movb %al, (%rsp,%rsi)
|
|
; SSE-NEXT: movaps (%rsp), %xmm0
|
|
; SSE-NEXT: movaps {{[0-9]+}}(%rsp), %xmm1
|
|
; SSE-NEXT: movq %rbp, %rsp
|
|
; SSE-NEXT: popq %rbp
|
|
; SSE-NEXT: retq
|
|
;
|
|
; AVX1-LABEL: load_i8_v32i8:
|
|
; AVX1: # %bb.0:
|
|
; AVX1-NEXT: movzbl (%rdi), %eax
|
|
; AVX1-NEXT: vmovd %eax, %xmm0
|
|
; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
|
|
; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm0
|
|
; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
|
|
; AVX1-NEXT: retq
|
|
;
|
|
; AVX2-LABEL: load_i8_v32i8:
|
|
; AVX2: # %bb.0:
|
|
; AVX2-NEXT: vpbroadcastb (%rdi), %ymm0
|
|
; AVX2-NEXT: retq
|
|
%x = load i8, i8* %p
|
|
%ins = insertelement <32 x i8> undef, i8 %x, i32 %y
|
|
ret <32 x i8> %ins
|
|
}
|
|
|
|
define <16 x i16> @load_i16_v16i16(i16* %p, i32 %y) nounwind {
|
|
; SSE-LABEL: load_i16_v16i16:
|
|
; SSE: # %bb.0:
|
|
; SSE-NEXT: pushq %rbp
|
|
; SSE-NEXT: movq %rsp, %rbp
|
|
; SSE-NEXT: andq $-32, %rsp
|
|
; SSE-NEXT: subq $64, %rsp
|
|
; SSE-NEXT: # kill: def $esi killed $esi def $rsi
|
|
; SSE-NEXT: movzwl (%rdi), %eax
|
|
; SSE-NEXT: andl $15, %esi
|
|
; SSE-NEXT: movw %ax, (%rsp,%rsi,2)
|
|
; SSE-NEXT: movaps (%rsp), %xmm0
|
|
; SSE-NEXT: movaps {{[0-9]+}}(%rsp), %xmm1
|
|
; SSE-NEXT: movq %rbp, %rsp
|
|
; SSE-NEXT: popq %rbp
|
|
; SSE-NEXT: retq
|
|
;
|
|
; AVX1-LABEL: load_i16_v16i16:
|
|
; AVX1: # %bb.0:
|
|
; AVX1-NEXT: movzwl (%rdi), %eax
|
|
; AVX1-NEXT: vmovd %eax, %xmm0
|
|
; AVX1-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,0,2,3,4,5,6,7]
|
|
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
|
|
; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
|
|
; AVX1-NEXT: retq
|
|
;
|
|
; AVX2-LABEL: load_i16_v16i16:
|
|
; AVX2: # %bb.0:
|
|
; AVX2-NEXT: vpbroadcastw (%rdi), %ymm0
|
|
; AVX2-NEXT: retq
|
|
%x = load i16, i16* %p
|
|
%ins = insertelement <16 x i16> undef, i16 %x, i32 %y
|
|
ret <16 x i16> %ins
|
|
}
|
|
|
|
define <8 x i32> @load_i32_v8i32(i32* %p, i32 %y) nounwind {
|
|
; SSE-LABEL: load_i32_v8i32:
|
|
; SSE: # %bb.0:
|
|
; SSE-NEXT: pushq %rbp
|
|
; SSE-NEXT: movq %rsp, %rbp
|
|
; SSE-NEXT: andq $-32, %rsp
|
|
; SSE-NEXT: subq $64, %rsp
|
|
; SSE-NEXT: # kill: def $esi killed $esi def $rsi
|
|
; SSE-NEXT: movl (%rdi), %eax
|
|
; SSE-NEXT: andl $7, %esi
|
|
; SSE-NEXT: movl %eax, (%rsp,%rsi,4)
|
|
; SSE-NEXT: movaps (%rsp), %xmm0
|
|
; SSE-NEXT: movaps {{[0-9]+}}(%rsp), %xmm1
|
|
; SSE-NEXT: movq %rbp, %rsp
|
|
; SSE-NEXT: popq %rbp
|
|
; SSE-NEXT: retq
|
|
;
|
|
; AVX-LABEL: load_i32_v8i32:
|
|
; AVX: # %bb.0:
|
|
; AVX-NEXT: vbroadcastss (%rdi), %ymm0
|
|
; AVX-NEXT: retq
|
|
%x = load i32, i32* %p
|
|
%ins = insertelement <8 x i32> undef, i32 %x, i32 %y
|
|
ret <8 x i32> %ins
|
|
}
|
|
|
|
define <4 x i64> @load_i64_v4i64(i64* %p, i32 %y) nounwind {
|
|
; SSE-LABEL: load_i64_v4i64:
|
|
; SSE: # %bb.0:
|
|
; SSE-NEXT: pushq %rbp
|
|
; SSE-NEXT: movq %rsp, %rbp
|
|
; SSE-NEXT: andq $-32, %rsp
|
|
; SSE-NEXT: subq $64, %rsp
|
|
; SSE-NEXT: # kill: def $esi killed $esi def $rsi
|
|
; SSE-NEXT: movq (%rdi), %rax
|
|
; SSE-NEXT: andl $3, %esi
|
|
; SSE-NEXT: movq %rax, (%rsp,%rsi,8)
|
|
; SSE-NEXT: movaps (%rsp), %xmm0
|
|
; SSE-NEXT: movaps {{[0-9]+}}(%rsp), %xmm1
|
|
; SSE-NEXT: movq %rbp, %rsp
|
|
; SSE-NEXT: popq %rbp
|
|
; SSE-NEXT: retq
|
|
;
|
|
; AVX-LABEL: load_i64_v4i64:
|
|
; AVX: # %bb.0:
|
|
; AVX-NEXT: vbroadcastsd (%rdi), %ymm0
|
|
; AVX-NEXT: retq
|
|
%x = load i64, i64* %p
|
|
%ins = insertelement <4 x i64> undef, i64 %x, i32 %y
|
|
ret <4 x i64> %ins
|
|
}
|
|
|
|
define <8 x float> @load_f32_v8f32(float* %p, i32 %y) nounwind {
|
|
; SSE-LABEL: load_f32_v8f32:
|
|
; SSE: # %bb.0:
|
|
; SSE-NEXT: pushq %rbp
|
|
; SSE-NEXT: movq %rsp, %rbp
|
|
; SSE-NEXT: andq $-32, %rsp
|
|
; SSE-NEXT: subq $64, %rsp
|
|
; SSE-NEXT: # kill: def $esi killed $esi def $rsi
|
|
; SSE-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
|
|
; SSE-NEXT: andl $7, %esi
|
|
; SSE-NEXT: movss %xmm0, (%rsp,%rsi,4)
|
|
; SSE-NEXT: movaps (%rsp), %xmm0
|
|
; SSE-NEXT: movaps {{[0-9]+}}(%rsp), %xmm1
|
|
; SSE-NEXT: movq %rbp, %rsp
|
|
; SSE-NEXT: popq %rbp
|
|
; SSE-NEXT: retq
|
|
;
|
|
; AVX-LABEL: load_f32_v8f32:
|
|
; AVX: # %bb.0:
|
|
; AVX-NEXT: vbroadcastss (%rdi), %ymm0
|
|
; AVX-NEXT: retq
|
|
%x = load float, float* %p
|
|
%ins = insertelement <8 x float> undef, float %x, i32 %y
|
|
ret <8 x float> %ins
|
|
}
|
|
|
|
define <4 x double> @load_f64_v4f64(double* %p, i32 %y) nounwind {
|
|
; SSE-LABEL: load_f64_v4f64:
|
|
; SSE: # %bb.0:
|
|
; SSE-NEXT: pushq %rbp
|
|
; SSE-NEXT: movq %rsp, %rbp
|
|
; SSE-NEXT: andq $-32, %rsp
|
|
; SSE-NEXT: subq $64, %rsp
|
|
; SSE-NEXT: # kill: def $esi killed $esi def $rsi
|
|
; SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
|
|
; SSE-NEXT: andl $3, %esi
|
|
; SSE-NEXT: movsd %xmm0, (%rsp,%rsi,8)
|
|
; SSE-NEXT: movaps (%rsp), %xmm0
|
|
; SSE-NEXT: movaps {{[0-9]+}}(%rsp), %xmm1
|
|
; SSE-NEXT: movq %rbp, %rsp
|
|
; SSE-NEXT: popq %rbp
|
|
; SSE-NEXT: retq
|
|
;
|
|
; AVX-LABEL: load_f64_v4f64:
|
|
; AVX: # %bb.0:
|
|
; AVX-NEXT: vbroadcastsd (%rdi), %ymm0
|
|
; AVX-NEXT: retq
|
|
%x = load double, double* %p
|
|
%ins = insertelement <4 x double> undef, double %x, i32 %y
|
|
ret <4 x double> %ins
|
|
}
|
|
|