forked from OSchip/llvm-project
65 lines
1.9 KiB
YAML
65 lines
1.9 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL
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--- |
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define void @test_unmerge_v128() {
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ret void
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}
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define void @test_unmerge_v256() {
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ret void
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}
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...
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---
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name: test_unmerge_v128
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alignment: 4
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legalized: true
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regBankSelected: true
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registers:
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- { id: 0, class: vecr }
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- { id: 1, class: vecr }
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- { id: 2, class: vecr }
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- { id: 3, class: vecr }
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- { id: 4, class: vecr }
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body: |
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bb.1 (%ir-block.0):
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; ALL-LABEL: name: test_unmerge_v128
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; ALL: [[DEF:%[0-9]+]]:vr512 = IMPLICIT_DEF
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; ALL: [[COPY:%[0-9]+]]:vr128x = COPY [[DEF]].sub_xmm
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; ALL: [[VEXTRACTF32x4Zrr:%[0-9]+]]:vr128x = VEXTRACTF32x4Zrr [[DEF]], 1
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; ALL: [[VEXTRACTF32x4Zrr1:%[0-9]+]]:vr128x = VEXTRACTF32x4Zrr [[DEF]], 2
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; ALL: [[VEXTRACTF32x4Zrr2:%[0-9]+]]:vr128x = VEXTRACTF32x4Zrr [[DEF]], 3
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; ALL: $xmm0 = COPY [[COPY]]
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; ALL: RET 0, implicit $xmm0
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%0(<16 x s32>) = IMPLICIT_DEF
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%1(<4 x s32>), %2(<4 x s32>), %3(<4 x s32>), %4(<4 x s32>) = G_UNMERGE_VALUES %0(<16 x s32>)
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$xmm0 = COPY %1(<4 x s32>)
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RET 0, implicit $xmm0
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...
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---
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name: test_unmerge_v256
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alignment: 4
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legalized: true
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regBankSelected: true
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registers:
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- { id: 0, class: vecr }
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- { id: 1, class: vecr }
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- { id: 2, class: vecr }
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body: |
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bb.1 (%ir-block.0):
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; ALL-LABEL: name: test_unmerge_v256
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; ALL: [[DEF:%[0-9]+]]:vr512 = IMPLICIT_DEF
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; ALL: [[COPY:%[0-9]+]]:vr256x = COPY [[DEF]].sub_ymm
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; ALL: [[VEXTRACTF64x4Zrr:%[0-9]+]]:vr256x = VEXTRACTF64x4Zrr [[DEF]], 1
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; ALL: $ymm0 = COPY [[COPY]]
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; ALL: RET 0, implicit $ymm0
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%0(<16 x s32>) = IMPLICIT_DEF
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%1(<8 x s32>), %2(<8 x s32>) = G_UNMERGE_VALUES %0(<16 x s32>)
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$ymm0 = COPY %1(<8 x s32>)
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RET 0, implicit $ymm0
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...
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