forked from OSchip/llvm-project
45 lines
1.2 KiB
YAML
45 lines
1.2 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL
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--- |
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define double @test(float %a) {
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entry:
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%conv = fpext float %a to double
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ret double %conv
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}
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...
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---
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name: test
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alignment: 4
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legalized: true
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regBankSelected: true
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registers:
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- { id: 0, class: vecr, preferred-register: '' }
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- { id: 1, class: vecr, preferred-register: '' }
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- { id: 2, class: vecr, preferred-register: '' }
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- { id: 3, class: vecr, preferred-register: '' }
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liveins:
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fixedStack:
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stack:
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constants:
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body: |
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bb.1.entry:
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liveins: $xmm0
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; ALL-LABEL: name: test
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; ALL: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0
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; ALL: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]]
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; ALL: [[CVTSS2SDrr:%[0-9]+]]:fr64 = CVTSS2SDrr [[COPY1]]
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; ALL: [[COPY2:%[0-9]+]]:vr128 = COPY [[CVTSS2SDrr]]
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; ALL: $xmm0 = COPY [[COPY2]]
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; ALL: RET 0, implicit $xmm0
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%1:vecr(s128) = COPY $xmm0
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%0:vecr(s32) = G_TRUNC %1(s128)
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%2:vecr(s64) = G_FPEXT %0(s32)
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%3:vecr(s128) = G_ANYEXT %2(s64)
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$xmm0 = COPY %3(s128)
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RET 0, implicit $xmm0
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...
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