llvm-project/llvm/test/CodeGen
Bjorn Pettersson a413663d8f [NewPM][test] Avoid using -enable-new-pm=1 since -passes implies new PM 2021-10-20 15:16:17 +02:00
..
AArch64 [SelectionDAG] Fix getVectorSubVecPointer for scalable subvectors. 2021-10-20 13:55:24 +01:00
AMDGPU [AMDGPU] add test for usubsat; NFC 2021-10-19 13:05:23 -04:00
ARC [ARC] Improve code generated for i32 ADDC/ADDE and SUBC/SUBE 2021-09-10 13:04:08 -07:00
ARM [ARM] Fix MOVCC peephole to not use an incorrect register class 2021-10-15 10:54:26 +01:00
AVR [TwoAddressInstructionPass] Improve the SrcRegMap and DstRegMap computation 2021-10-11 15:28:31 -07:00
BPF BPF: set .BTF and .BTF.ext section alignment to 4 2021-10-19 16:26:01 -07:00
Generic [AIX] Disable tests failing due to lack of .loc and .file directive support 2021-10-08 11:55:12 -04:00
Hexagon [LiveIntervals] Repair subreg ranges in processTiedPairs 2021-09-28 08:10:16 +01:00
Inputs
Lanai [Lanai] implement wide immediate support 2021-09-10 10:54:43 +00:00
M68k [M68k][test] Migrate the remaining fixup and relaxation tests 2021-09-04 16:27:13 -07:00
MIR DebugInfo: Use clang's preferred names for integer types 2021-10-06 16:02:34 -07:00
MSP430 [llvm-readobj] Support dumping of MSP430 ELF attributes 2021-09-28 00:56:11 +03:00
Mips [Mips] Add glue between CopyFromReg, CopyToReg and RDHWR nodes for TLS 2021-10-18 15:10:20 +01:00
NVPTX [NVPTX] Add a late SROA pass which allows optimizing away more allocas. 2021-10-19 16:18:28 -07:00
PowerPC [NewPM][test] Avoid using -enable-new-pm=1 since -passes implies new PM 2021-10-20 15:16:17 +02:00
RISCV [RISCV] Reorder the vector register allocation order. 2021-10-19 09:30:13 +08:00
SPARC Fix tests defaulting to incorrect triples on AIX 2021-09-27 11:30:45 -04:00
SystemZ [SystemZ] Handle huge immediates in SystemZInstrInfo::loadImmediate(). 2021-10-15 19:08:45 +02:00
Thumb [TwoAddressInstructionPass] Improve the SrcRegMap and DstRegMap computation 2021-10-11 15:28:31 -07:00
Thumb2 [ARM] Introduce a MQPRCopy 2021-10-07 12:52:12 +01:00
VE [VE][Test] Make Scalar/va_arg test generic 2021-10-08 08:07:51 +02:00
WebAssembly [WebAssembly] Implementation of table.get/set for reftypes in LLVM IR 2021-10-20 10:31:31 +02:00
WinCFGuard
WinEH
X86 [x86] add special-case lowering for usubsat for pre-SSE4 2021-10-19 17:13:16 -04:00
XCore