..
CMakeLists.txt
[GlobalISel] Introduce InlineAsmLowering class
2020-04-20 15:10:18 +02:00
CSEInfo.cpp
[GISel]: Fix one more CSE Non determinism
2020-08-27 09:06:21 -07:00
CSEMIRBuilder.cpp
[GlobalISel] Fix CSEMIRBuilder silently allowing use-before-def.
2020-10-05 11:00:00 -07:00
CallLowering.cpp
[SVE][CodeGen][NFC] Replace TypeSize comparison operators with their scalar equivalents
2020-10-19 08:30:31 +01:00
Combiner.cpp
[GlobalISel] fix a compilation error with gcc 6.3.0
2020-08-28 09:16:52 -07:00
CombinerHelper.cpp
[GISel] Add combine for constant G_PTR_ADD offsets.
2020-10-13 17:26:12 -07:00
GISelChangeObserver.cpp
GlobalISel: Use Register
2020-08-19 13:45:31 -04:00
GISelKnownBits.cpp
[GlobalISel][KnownBits] Early return on out of bound shift amounts
2020-10-12 18:39:19 +02:00
GlobalISel.cpp
…
IRTranslator.cpp
[GlobalISel] Add translation support for vector reduction intrinsics.
2020-10-16 10:17:53 -07:00
InlineAsmLowering.cpp
[GlobalISel][InlineAsm] Fix matching input constraint to physreg
2020-08-06 14:35:51 +02:00
InstructionSelect.cpp
GlobalISel: Move finalizeLowering call later
2020-07-06 09:19:40 -04:00
InstructionSelector.cpp
GlobalISel: Remove unused function argument
2020-02-14 15:57:39 -08:00
LLVMBuild.txt
…
LegalityPredicates.cpp
Fix wrong comment about enabling optimizations to work around a bug
2020-09-10 16:45:20 -07:00
LegalizeMutations.cpp
GlobalISel: Add scalarSameSizeAs LegalizeRule
2020-07-23 21:17:31 -04:00
Legalizer.cpp
GlobalISel: Improve dead instruction debug printing
2020-08-24 10:12:00 -04:00
LegalizerHelper.cpp
[GlobalISel] Fix multiply with overflow intrinsics legalization generating invalid MIR.
2020-09-29 18:40:58 -07:00
LegalizerInfo.cpp
GlobalISel: Assert if MoreElements uses a non-vector type
2020-09-30 10:36:00 -04:00
Localizer.cpp
Revert "Revert "[GlobalISel][Localizer] Enable intra-block localization of already-local uses.""
2020-03-06 21:35:08 -08:00
LostDebugLocObserver.cpp
Give helpers internal linkage. NFC.
2020-04-25 11:50:52 +02:00
MachineIRBuilder.cpp
[GlobalISel] Implement bit-test switch table optimization.
2020-08-12 11:31:39 -07:00
RegBankSelect.cpp
[GlobalISel][InlineAsm] Add support for basic output operand constraints
2020-05-06 10:06:13 +02:00
RegisterBank.cpp
Revert "[TableGen][GlobalISel] Account for HwMode in RegisterBank register sizes"
2020-03-20 11:02:50 +01:00
RegisterBankInfo.cpp
Revert "[TableGen][GlobalISel] Account for HwMode in RegisterBank register sizes"
2020-03-20 11:02:50 +01:00
Utils.cpp
AMDGPU/GlobalISel Check for NoNaNsFPMath in isKnownNeverSNaN
2020-09-14 12:11:00 +02:00
35a531fb45