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llvm-project/llvm/test/CodeGen/MIR/AMDGPU
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Tim Northover 6b3bd61283 CodeGen: add new "intrinsic" MachineOperand kind. 
This will be used during GlobalISel, where we need a more robust and readable
way to write tests than a simple immediate ID.

llvm-svn: 277209
 		2016-07-29 20:32:59 +00:00
..
expected-target-index-name.mir llc: Add support for -run-pass none 2016-07-16 02:24:59 +00:00
intrinsics.mir CodeGen: add new "intrinsic" MachineOperand kind. 2016-07-29 20:32:59 +00:00
invalid-target-index-operand.mir llc: Add support for -run-pass none 2016-07-16 02:24:59 +00:00
lit.local.cfg
…
target-index-operands.mir llc: Add support for -run-pass none 2016-07-16 02:24:59 +00:00