forked from OSchip/llvm-project
6d18c2067e
This patch adjust the load/store matrix intrinsics, formerly known as llvm.matrix.columnwise.load/store, to improve the naming and allow passing of extra information (volatile). The patch performs the following changes: * Rename columnwise.load/store to column.major.load/store. This is more expressive and also more in line with the naming in Clang. * Changes the stride arguments from i32 to i64. The stride can be larger than i32 and this makes things more uniform with the way things are handled in Clang. * A new boolean argument is added to indicate whether the load/store is volatile. The lowering respects that when emitting vector load/store instructions * MatrixBuilder is updated to require both Alignment and IsVolatile arguments, which are passed through to the generated intrinsic. The alignment is set using the `align` attribute. The changes are grouped together in a single patch, to have a single commit that breaks the compatibility. We probably should be fine with updating the intrinsics, as we did not yet officially support them in the last stable release. If there are any concerns, we can add auto-upgrade rules for the columnwise intrinsics though. Reviewers: anemet, Gerolf, hfinkel, andrew.w.kaylor, LuoYuanke, nicolasvasilache, rjmccall, ftynse Reviewed By: anemet, nicolasvasilache Differential Revision: https://reviews.llvm.org/D81472 |
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| .. | ||
| Analysis | ||
| Conversion | ||
| Dialect | ||
| EDSC | ||
| Examples | ||
| IR | ||
| Pass | ||
| SDBM | ||
| Target | ||
| Transforms | ||
| Unit | ||
| lib | ||
| mlir-cpu-runner | ||
| mlir-cuda-runner | ||
| mlir-linalg-ods-gen | ||
| mlir-opt | ||
| mlir-rocm-runner | ||
| mlir-tblgen | ||
| mlir-vulkan-runner | ||
| APITest.h | ||
| CMakeLists.txt | ||
| lit.cfg.py | ||
| lit.site.cfg.py.in | ||