.. |
AsmParser
|
[Hexagon] Define certain aliases for vector instructions
|
2016-04-28 16:43:16 +00:00 |
Disassembler
|
[NFC] Header cleanup
|
2016-04-18 09:17:29 +00:00 |
MCTargetDesc
|
[Hexagon] Handle double-vector registers as new-value producers
|
2016-04-28 15:54:48 +00:00 |
TargetInfo
|
Remove autoconf support
|
2016-01-26 21:29:08 +00:00 |
BitTracker.cpp
|
[Hexagon] Fix compilation error with GCC 6
|
2016-02-18 16:10:27 +00:00 |
BitTracker.h
|
-Wdeprecated-clean: Fix cases of violating the rule of 5 in ways that are deprecated in C++11
|
2015-08-01 05:31:27 +00:00 |
CMakeLists.txt
|
[Hexagon] Implement branch relaxation
|
2016-04-19 18:30:18 +00:00 |
Hexagon.h
|
[Hexagon] Improve lowering of instructions to the MC layer
|
2015-12-02 23:08:29 +00:00 |
Hexagon.td
|
[Hexagon] Define certain aliases for vector instructions
|
2016-04-28 16:43:16 +00:00 |
HexagonAlias.td
|
[Hexagon] Define certain aliases for vector instructions
|
2016-04-28 16:43:16 +00:00 |
HexagonAsmPrinter.cpp
|
[NFC] Header cleanup
|
2016-04-18 09:17:29 +00:00 |
HexagonAsmPrinter.h
|
[Hexagon] Preprocess mapped instructions before lowering to MC
|
2015-12-15 17:05:45 +00:00 |
HexagonBitSimplify.cpp
|
Add optimization bisect opt-in calls for Hexagon passes
|
2016-04-26 19:46:28 +00:00 |
HexagonBitTracker.cpp
|
CodeGen: TII: Take MachineInstr& in predicate API, NFC
|
2016-02-23 02:46:52 +00:00 |
HexagonBitTracker.h
|
…
|
|
HexagonBlockRanges.cpp
|
[Hexagon] Properly close live range in HexagonBlockRanges
|
2016-04-22 17:27:22 +00:00 |
HexagonBlockRanges.h
|
[Hexagon] Optimize stack slot spills
|
2016-02-12 22:53:35 +00:00 |
HexagonBranchRelaxation.cpp
|
[Hexagon] Implement branch relaxation
|
2016-04-19 18:30:18 +00:00 |
HexagonCFGOptimizer.cpp
|
Add optimization bisect opt-in calls for Hexagon passes
|
2016-04-26 19:46:28 +00:00 |
HexagonCallingConv.td
|
…
|
|
HexagonCommonGEP.cpp
|
Add optimization bisect opt-in calls for Hexagon passes
|
2016-04-26 19:46:28 +00:00 |
HexagonCopyToCombine.cpp
|
Add MachineFunctionProperty checks for AllVRegsAllocated for target passes
|
2016-04-04 17:09:25 +00:00 |
HexagonEarlyIfConv.cpp
|
Add optimization bisect opt-in calls for Hexagon passes
|
2016-04-26 19:46:28 +00:00 |
HexagonExpandCondsets.cpp
|
Add optimization bisect opt-in calls for Hexagon passes
|
2016-04-26 19:46:28 +00:00 |
HexagonFixupHwLoops.cpp
|
Add optimization bisect opt-in calls for Hexagon passes
|
2016-04-26 19:46:28 +00:00 |
HexagonFrameLowering.cpp
|
[Hexagon] Register save/restore functions do not follow regular conventions
|
2016-04-25 17:49:44 +00:00 |
HexagonFrameLowering.h
|
[Hexagon] Register save/restore functions do not follow regular conventions
|
2016-04-25 17:49:44 +00:00 |
HexagonGenExtract.cpp
|
Add optimization bisect opt-in calls for Hexagon passes
|
2016-04-26 19:46:28 +00:00 |
HexagonGenInsert.cpp
|
Add optimization bisect opt-in calls for Hexagon passes
|
2016-04-26 19:46:28 +00:00 |
HexagonGenMux.cpp
|
Add optimization bisect opt-in calls for Hexagon passes
|
2016-04-26 19:46:28 +00:00 |
HexagonGenPredicate.cpp
|
Add optimization bisect opt-in calls for Hexagon passes
|
2016-04-26 19:46:28 +00:00 |
HexagonHardwareLoops.cpp
|
Add optimization bisect opt-in calls for Hexagon passes
|
2016-04-26 19:46:28 +00:00 |
HexagonISelDAGToDAG.cpp
|
[NFC] Header cleanup
|
2016-04-18 09:17:29 +00:00 |
HexagonISelLowering.cpp
|
[CodeGen] Default CTTZ_ZERO_UNDEF/CTLZ_ZERO_UNDEF to Expand in TargetLoweringBase. This is what the majority of the targets want and removes a bunch of code. Set it to Legal explicitly in the few cases where that's the desired behavior.
|
2016-04-28 03:34:31 +00:00 |
HexagonISelLowering.h
|
Use MVT instead of EVT to remove a bunch of unnecessary calls to getSimpleVT.
|
2016-04-15 06:20:21 +00:00 |
HexagonInstrAlias.td
|
[Hexagon] Adding instruction aliases and tests.
|
2015-11-10 01:58:26 +00:00 |
HexagonInstrEnc.td
|
[Hexagon] Adding skeleton of HVX extension instructions.
|
2015-10-17 01:33:04 +00:00 |
HexagonInstrFormats.td
|
[Hexagon] Remove the remnants of isConstExtProfitable
|
2015-10-20 19:04:53 +00:00 |
HexagonInstrFormatsV4.td
|
[Hexagon] Update instruction formats
|
2015-11-23 14:09:26 +00:00 |
HexagonInstrFormatsV60.td
|
[Hexagon] Update instruction formats
|
2015-11-23 14:09:26 +00:00 |
HexagonInstrInfo.cpp
|
[Hexagon] Generate PIC-specific versions of save/restore routines
|
2016-03-24 19:18:48 +00:00 |
HexagonInstrInfo.h
|
CodeGen: TII: Take MachineInstr& in predicate API, NFC
|
2016-02-23 02:46:52 +00:00 |
HexagonInstrInfo.td
|
[Hexagon] Set ctlz_zero_undef/cttz_zero_undef to Expand so LegalizeDAG will convert them to ctlz/cttz. Remove the now unneccessary isel patterns. NFC
|
2016-04-23 02:49:31 +00:00 |
HexagonInstrInfoV3.td
|
[Hexagon] Register save/restore functions do not follow regular conventions
|
2016-04-25 17:49:44 +00:00 |
HexagonInstrInfoV4.td
|
[Hexagon] Register save/restore functions do not follow regular conventions
|
2016-04-25 17:49:44 +00:00 |
HexagonInstrInfoV5.td
|
[Hexagon] Treat transfers of FP immediates are pseudo instructions
|
2015-11-25 21:40:03 +00:00 |
HexagonInstrInfoV60.td
|
[Hexagon] Improve handling of unaligned vector loads and stores
|
2016-03-28 15:43:03 +00:00 |
HexagonInstrInfoVector.td
|
[Hexagon] Hexagon V60 HVX intrinsic defintions
|
2015-11-26 16:54:33 +00:00 |
HexagonIntrinsics.td
|
[Hexagon] Use common Pat classes for selecting code for intrinsics
|
2016-04-22 18:05:55 +00:00 |
HexagonIntrinsicsDerived.td
|
…
|
|
HexagonIntrinsicsV3.td
|
…
|
|
HexagonIntrinsicsV4.td
|
[Hexagon] Use common Pat classes for selecting code for intrinsics
|
2016-04-22 18:05:55 +00:00 |
HexagonIntrinsicsV5.td
|
[Hexagon] Use common Pat classes for selecting code for intrinsics
|
2016-04-22 18:05:55 +00:00 |
HexagonIntrinsicsV60.td
|
[Hexagon] Use common Pat classes for selecting code for intrinsics
|
2016-04-22 18:05:55 +00:00 |
HexagonIsetDx.td
|
…
|
|
HexagonMCInstLower.cpp
|
[Hexagon] Using MustExtend flag on expression instead of passing around bools.
|
2016-02-29 18:39:51 +00:00 |
HexagonMachineFunctionInfo.cpp
|
…
|
|
HexagonMachineFunctionInfo.h
|
[Hexagon] Speed up frame lowering when no optimizations are enabled
|
2016-03-28 14:42:03 +00:00 |
HexagonMachineScheduler.cpp
|
CodeGen: Update DFAPacketizer API to take MachineInstr&, NFC
|
2016-02-27 19:09:00 +00:00 |
HexagonMachineScheduler.h
|
[NFC] Header cleanup
|
2016-04-18 09:17:29 +00:00 |
HexagonNewValueJump.cpp
|
Add optimization bisect opt-in calls for Hexagon passes
|
2016-04-26 19:46:28 +00:00 |
HexagonOperands.td
|
[Hexagon] Adding relocation for code size, cold path optimization allowing a 23-bit 4-byte aligned relocation to be a valid instruction encoding.
|
2016-02-16 20:38:17 +00:00 |
HexagonOptimizeSZextends.cpp
|
Add optimization bisect opt-in calls for Hexagon passes
|
2016-04-26 19:46:28 +00:00 |
HexagonPeephole.cpp
|
Add optimization bisect opt-in calls for Hexagon passes
|
2016-04-26 19:46:28 +00:00 |
HexagonRDF.cpp
|
[Hexagon] Implement RDF-based post-RA optimizations
|
2016-01-12 19:09:01 +00:00 |
HexagonRDF.h
|
[Hexagon] Implement RDF-based post-RA optimizations
|
2016-01-12 19:09:01 +00:00 |
HexagonRDFOpt.cpp
|
Add optimization bisect opt-in calls for Hexagon passes
|
2016-04-26 19:46:28 +00:00 |
HexagonRegisterInfo.cpp
|
[NFC] Header cleanup
|
2016-04-18 09:17:29 +00:00 |
HexagonRegisterInfo.h
|
[Hexagon] Fix reserving emergency spill slots for register scavenger
|
2016-03-21 19:57:08 +00:00 |
HexagonRegisterInfo.td
|
[Hexagon] Properly recognize register alt names
|
2016-04-21 19:49:53 +00:00 |
HexagonSchedule.td
|
[Hexagon] Update instruction formats
|
2015-11-23 14:09:26 +00:00 |
HexagonScheduleV4.td
|
TableGen: Check scheduling models for completeness
|
2016-03-01 20:03:21 +00:00 |
HexagonScheduleV55.td
|
TableGen: Check scheduling models for completeness
|
2016-03-01 20:03:21 +00:00 |
HexagonScheduleV60.td
|
TableGen: Check scheduling models for completeness
|
2016-03-01 20:03:21 +00:00 |
HexagonSelectCCInfo.td
|
…
|
|
HexagonSelectionDAGInfo.cpp
|
[Hexagon] Make memcpy lowering thread-safe
|
2015-12-16 17:29:37 +00:00 |
HexagonSelectionDAGInfo.h
|
Rename TargetSelectionDAGInfo into SelectionDAGTargetInfo and move it to CodeGen/
|
2016-01-27 16:32:26 +00:00 |
HexagonSplitConst32AndConst64.cpp
|
[Hexagon] Expand handling of the small-data/bss section
|
2016-04-21 18:56:45 +00:00 |
HexagonSplitDouble.cpp
|
Add optimization bisect opt-in calls for Hexagon passes
|
2016-04-26 19:46:28 +00:00 |
HexagonStoreWidening.cpp
|
Add optimization bisect opt-in calls for Hexagon passes
|
2016-04-26 19:46:28 +00:00 |
HexagonSubtarget.cpp
|
[Hexagon] Subtarget features/default CPU corrections
|
2015-12-14 15:03:54 +00:00 |
HexagonSubtarget.h
|
[Hexagon] Subtarget features/default CPU corrections
|
2015-12-14 15:03:54 +00:00 |
HexagonSystemInst.td
|
[Hexagon] Add definitions for trap/pause instructions
|
2016-04-22 16:25:00 +00:00 |
HexagonTargetMachine.cpp
|
[Hexagon] Implement branch relaxation
|
2016-04-19 18:30:18 +00:00 |
HexagonTargetMachine.h
|
[Hexagon] Add PIC support
|
2015-12-18 20:19:30 +00:00 |
HexagonTargetObjectFile.cpp
|
[Hexagon] Expand handling of the small-data/bss section
|
2016-04-21 18:56:45 +00:00 |
HexagonTargetObjectFile.h
|
[Hexagon] Expand handling of the small-data/bss section
|
2016-04-21 18:56:45 +00:00 |
HexagonTargetStreamer.h
|
…
|
|
HexagonTargetTransformInfo.cpp
|
[Hexagon] Edit a comment. NFC
|
2015-08-05 21:08:26 +00:00 |
HexagonTargetTransformInfo.h
|
constify the Function parameter to the TTI creation callback and
|
2015-09-16 23:38:13 +00:00 |
HexagonVLIWPacketizer.cpp
|
Add optimization bisect opt-in calls for Hexagon passes
|
2016-04-26 19:46:28 +00:00 |
HexagonVLIWPacketizer.h
|
CodeGen: Update DFAPacketizer API to take MachineInstr&, NFC
|
2016-02-27 19:09:00 +00:00 |
LLVMBuild.txt
|
[Hexagon] Adding LLVMBuild.txt reference to HexagonAsmParser.
|
2015-11-09 04:31:02 +00:00 |
RDFCopy.cpp
|
[RDF] Handle undefined registers in RDF copy propagation
|
2016-04-28 15:09:19 +00:00 |
RDFCopy.h
|
[RDF] Improvements to copy propagation
|
2016-01-18 20:43:57 +00:00 |
RDFDeadCode.cpp
|
[RDF] Improve compile-time performance of dead code elimination
|
2016-01-18 20:42:47 +00:00 |
RDFDeadCode.h
|
[RDF] Improve compile-time performance of dead code elimination
|
2016-01-18 20:42:47 +00:00 |
RDFGraph.cpp
|
CodeGen: TII: Take MachineInstr& in predicate API, NFC
|
2016-02-23 02:46:52 +00:00 |
RDFGraph.h
|
[NFC] Header cleanup
|
2016-04-18 09:17:29 +00:00 |
RDFLiveness.cpp
|
[RDF] Consider register as live if any alias is live
|
2016-04-20 14:33:23 +00:00 |
RDFLiveness.h
|
RDF: Implement register liveness analysis
|
2016-01-12 15:56:33 +00:00 |