Reed Kotler aee4d5d194 This patch is needed to make c++ exceptions work for mips16. ... Mips16 is really a processor decoding mode (ala thumb 1) and in the same program, mips16 and mips32 functions can exist and can call each other. If a jal type instruction encounters an address with the lower bit set, then the processor switches to mips16 mode (if it is not already in it). If the lower bit is not set, then it switches to mips32 mode. The linker knows which functions are mips16 and which are mips32. When relocation is performed on code labels, this lower order bit is set if the code label is a mips16 code label. In general this works just fine, however when creating exception handling tables and dwarf, there are cases where you don't want this lower order bit added in. This has been traditionally distinguished in gas assembly source by using a different syntax for the label. lab1: ; this will cause the lower order bit to be added lab2=. ; this will not cause the lower order bit to be added In some cases, it does not matter because in dwarf and debug tables the difference of two labels is used and in that case the lower order bits subtract each other out. To fix this, I have added to mcstreamer the notion of a debuglabel. The default is for label and debug label to be the same. So calling EmitLabel and EmitDebugLabel produce the same result. For various reasons, there is only one set of labels that needs to be modified for the mips exceptions to work. These are the "$eh_func_beginXXX" labels. Mips overrides the debug label suffix from ":" to "=." . This initial patch fixes exceptions. More changes most likely will be needed to DwarfCFException to make all of this work for actual debugging. These changes will be to emit debug labels in some places where a simple label is emitted now. Some historical discussion on this from gcc can be found at: http://gcc.gnu.org/ml/gcc-patches/2008-08/msg00623.html http://gcc.gnu.org/ml/gcc-patches/2008-11/msg01273.html llvm-svn: 170279		2012-12-16 04:00:45 +00:00
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CMakeLists.txt	The mips 64bit instructions DSLL, DSRA, DSRL, DEXT and DINS get transformed by the assembler or through codegen direct object output to other variants based on the value of the immediate values of the operands.	2012-10-02 23:09:40 +00:00
LLVMBuild.txt	LLVMBuild: Remove trailing newline, which irked me.	2011-12-12 19:48:00 +00:00
Makefile	Test commit	2012-06-09 00:27:55 +00:00
MipsAsmBackend.cpp	Mips direct object xgot support	2012-11-21 23:38:59 +00:00
MipsBaseInfo.h	[mips] Set HWEncoding field of registers. Use delete function	2012-12-10 20:04:40 +00:00
MipsDirectObjLower.cpp	The mips 64bit instructions DSLL, DSRA, DSRL, DEXT and DINS get transformed by the assembler or through codegen direct object output to other variants based on the value of the immediate values of the operands.	2012-10-02 23:09:40 +00:00
MipsDirectObjLower.h	The mips 64bit instructions DSLL, DSRA, DSRL, DEXT and DINS get transformed by the assembler or through codegen direct object output to other variants based on the value of the immediate values of the operands.	2012-10-02 23:09:40 +00:00
MipsELFObjectWriter.cpp	Mips direct object xgot support	2012-11-21 23:38:59 +00:00
MipsFixupKinds.h	Mips direct object xgot support	2012-11-21 23:38:59 +00:00
MipsMCAsmInfo.cpp	This patch is needed to make c++ exceptions work for mips16.	2012-12-16 04:00:45 +00:00
MipsMCAsmInfo.h	Prune some includes	2012-03-27 07:54:11 +00:00
MipsMCCodeEmitter.cpp	[mips] Set HWEncoding field of registers. Use delete function	2012-12-10 20:04:40 +00:00
MipsMCTargetDesc.cpp	Use the new script to sort the includes of every file under lib.	2012-12-03 16:50:05 +00:00
MipsMCTargetDesc.h	When creating MCAsmBackend pass the CPU string as well. In X86AsmBackend	2012-09-18 16:08:49 +00:00