llvm-project/llvm/test/CodeGen/AMDGPU/hazard-buffer-store-v-inter...

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# RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -run-pass post-RA-hazard-rec %s -o - | FileCheck -check-prefix=GCN %s
# RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -run-pass post-RA-hazard-rec %s -o - | FileCheck -check-prefix=GCN %s
# GCN-LABEL: name: hazard_buffer_store_v_interp
# GCN: bb.0.entry:
# GCN-NEXT: BUFFER_STORE_DWORDX4_OFFSET_exact
# GCN-NEXT: S_NOP
# GCN-NEXT: V_INTERP_P1_F32
name: hazard_buffer_store_v_interp
body: |
bb.0.entry:
liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $vgpr0, $vgpr1, $vgpr7, $vgpr8, $vgpr9, $vgpr10
BUFFER_STORE_DWORDX4_OFFSET_exact killed $vgpr7_vgpr8_vgpr9_vgpr10, $sgpr4_sgpr5_sgpr6_sgpr7, 0, 96, 0, 0, 0, implicit $exec
$vgpr7 = V_INTERP_P1_F32 $vgpr0, 0, 0, implicit $mode, implicit $m0, implicit $exec
S_ENDPGM 0
...