forked from OSchip/llvm-project
261 lines
11 KiB
LLVM
261 lines
11 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -march=amdgcn -mcpu=tahiti -denormal-fp-math-f32=ieee < %s | FileCheck --check-prefix=FMA %s
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; RUN: llc -march=amdgcn -mcpu=verde -denormal-fp-math-f32=ieee < %s | FileCheck --check-prefix=NOFUSE %s
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; RUN: llc -march=amdgcn -mcpu=fiji -denormal-fp-math-f32=ieee < %s | FileCheck --check-prefix=NOFUSE %s
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; RUN: llc -march=amdgcn -mcpu=tonga -denormal-fp-math-f32=ieee < %s | FileCheck --check-prefix=NOFUSE %s
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; RUN: llc -march=amdgcn -mcpu=gfx900 -denormal-fp-math-f32=ieee < %s | FileCheck --check-prefix=FMA %s
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; RUN: llc -march=amdgcn -mcpu=gfx1010 -denormal-fp-math-f32=ieee < %s | FileCheck --check-prefix=FMAGFX10 %s
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; RUN: llc -march=amdgcn -mcpu=tahiti -denormal-fp-math-f32=preserve-sign < %s | FileCheck --check-prefix=FMAD %s
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; RUN: llc -march=amdgcn -mcpu=verde -denormal-fp-math-f32=preserve-sign < %s | FileCheck --check-prefix=FMAD %s
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; RUN: llc -march=amdgcn -mcpu=fiji -denormal-fp-math-f32=preserve-sign < %s | FileCheck --check-prefix=FMAD %s
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; RUN: llc -march=amdgcn -mcpu=tonga -denormal-fp-math-f32=preserve-sign < %s | FileCheck --check-prefix=FMAD %s
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; RUN: llc -march=amdgcn -mcpu=gfx900 -denormal-fp-math-f32=preserve-sign < %s | FileCheck --check-prefix=FMAD %s
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; RUN: llc -march=amdgcn -mcpu=gfx1010 -denormal-fp-math-f32=preserve-sign < %s | FileCheck --check-prefix=FMADGFX10 %s
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; Check for incorrect fmad formation when distributing
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define float @unsafe_fmul_fadd_distribute_fast_f32(float %arg0, float %arg1) #0 {
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; FMA-LABEL: unsafe_fmul_fadd_distribute_fast_f32:
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; FMA: ; %bb.0:
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; FMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; FMA-NEXT: v_fma_f32 v0, v1, v0, v0
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; FMA-NEXT: s_setpc_b64 s[30:31]
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;
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; NOFUSE-LABEL: unsafe_fmul_fadd_distribute_fast_f32:
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; NOFUSE: ; %bb.0:
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; NOFUSE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; NOFUSE-NEXT: v_add_f32_e32 v1, 1.0, v1
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; NOFUSE-NEXT: v_mul_f32_e32 v0, v0, v1
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; NOFUSE-NEXT: s_setpc_b64 s[30:31]
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;
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; FMAGFX10-LABEL: unsafe_fmul_fadd_distribute_fast_f32:
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; FMAGFX10: ; %bb.0:
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; FMAGFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; FMAGFX10-NEXT: s_waitcnt_vscnt null, 0x0
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; FMAGFX10-NEXT: v_fmac_f32_e32 v0, v1, v0
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; FMAGFX10-NEXT: s_setpc_b64 s[30:31]
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;
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; FMAD-LABEL: unsafe_fmul_fadd_distribute_fast_f32:
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; FMAD: ; %bb.0:
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; FMAD-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; FMAD-NEXT: v_mac_f32_e32 v0, v1, v0
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; FMAD-NEXT: s_setpc_b64 s[30:31]
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;
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; FMADGFX10-LABEL: unsafe_fmul_fadd_distribute_fast_f32:
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; FMADGFX10: ; %bb.0:
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; FMADGFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; FMADGFX10-NEXT: s_waitcnt_vscnt null, 0x0
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; FMADGFX10-NEXT: v_fmac_f32_e32 v0, v1, v0
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; FMADGFX10-NEXT: s_setpc_b64 s[30:31]
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%add = fadd fast float %arg1, 1.0
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%tmp1 = fmul fast float %arg0, %add
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ret float %tmp1
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}
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define float @unsafe_fmul_fsub_distribute_fast_f32(float %arg0, float %arg1) #0 {
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; FMA-LABEL: unsafe_fmul_fsub_distribute_fast_f32:
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; FMA: ; %bb.0:
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; FMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; FMA-NEXT: v_fma_f32 v0, -v1, v0, v0
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; FMA-NEXT: s_setpc_b64 s[30:31]
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;
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; NOFUSE-LABEL: unsafe_fmul_fsub_distribute_fast_f32:
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; NOFUSE: ; %bb.0:
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; NOFUSE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; NOFUSE-NEXT: v_sub_f32_e32 v1, 1.0, v1
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; NOFUSE-NEXT: v_mul_f32_e32 v0, v0, v1
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; NOFUSE-NEXT: s_setpc_b64 s[30:31]
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;
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; FMAGFX10-LABEL: unsafe_fmul_fsub_distribute_fast_f32:
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; FMAGFX10: ; %bb.0:
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; FMAGFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; FMAGFX10-NEXT: s_waitcnt_vscnt null, 0x0
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; FMAGFX10-NEXT: v_fmac_f32_e64 v0, -v1, v0
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; FMAGFX10-NEXT: s_setpc_b64 s[30:31]
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;
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; FMAD-LABEL: unsafe_fmul_fsub_distribute_fast_f32:
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; FMAD: ; %bb.0:
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; FMAD-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; FMAD-NEXT: v_mad_f32 v0, -v1, v0, v0
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; FMAD-NEXT: s_setpc_b64 s[30:31]
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;
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; FMADGFX10-LABEL: unsafe_fmul_fsub_distribute_fast_f32:
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; FMADGFX10: ; %bb.0:
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; FMADGFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; FMADGFX10-NEXT: s_waitcnt_vscnt null, 0x0
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; FMADGFX10-NEXT: v_fmac_f32_e64 v0, -v1, v0
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; FMADGFX10-NEXT: s_setpc_b64 s[30:31]
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%add = fsub fast float 1.0, %arg1
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%tmp1 = fmul fast float %arg0, %add
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ret float %tmp1
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}
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define <2 x float> @unsafe_fmul_fadd_distribute_fast_v2f32(<2 x float> %arg0, <2 x float> %arg1) #0 {
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; FMA-LABEL: unsafe_fmul_fadd_distribute_fast_v2f32:
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; FMA: ; %bb.0:
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; FMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; FMA-NEXT: v_fma_f32 v0, v2, v0, v0
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; FMA-NEXT: v_fma_f32 v1, v3, v1, v1
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; FMA-NEXT: s_setpc_b64 s[30:31]
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;
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; NOFUSE-LABEL: unsafe_fmul_fadd_distribute_fast_v2f32:
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; NOFUSE: ; %bb.0:
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; NOFUSE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; NOFUSE-NEXT: v_add_f32_e32 v3, 1.0, v3
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; NOFUSE-NEXT: v_add_f32_e32 v2, 1.0, v2
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; NOFUSE-NEXT: v_mul_f32_e32 v0, v0, v2
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; NOFUSE-NEXT: v_mul_f32_e32 v1, v1, v3
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; NOFUSE-NEXT: s_setpc_b64 s[30:31]
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;
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; FMAGFX10-LABEL: unsafe_fmul_fadd_distribute_fast_v2f32:
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; FMAGFX10: ; %bb.0:
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; FMAGFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; FMAGFX10-NEXT: s_waitcnt_vscnt null, 0x0
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; FMAGFX10-NEXT: v_fmac_f32_e32 v0, v2, v0
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; FMAGFX10-NEXT: v_fmac_f32_e32 v1, v3, v1
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; FMAGFX10-NEXT: s_setpc_b64 s[30:31]
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;
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; FMAD-LABEL: unsafe_fmul_fadd_distribute_fast_v2f32:
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; FMAD: ; %bb.0:
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; FMAD-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; FMAD-NEXT: v_mac_f32_e32 v0, v2, v0
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; FMAD-NEXT: v_mac_f32_e32 v1, v3, v1
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; FMAD-NEXT: s_setpc_b64 s[30:31]
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;
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; FMADGFX10-LABEL: unsafe_fmul_fadd_distribute_fast_v2f32:
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; FMADGFX10: ; %bb.0:
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; FMADGFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; FMADGFX10-NEXT: s_waitcnt_vscnt null, 0x0
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; FMADGFX10-NEXT: v_fmac_f32_e32 v0, v2, v0
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; FMADGFX10-NEXT: v_fmac_f32_e32 v1, v3, v1
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; FMADGFX10-NEXT: s_setpc_b64 s[30:31]
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%add = fadd fast <2 x float> %arg1, <float 1.0, float 1.0>
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%tmp1 = fmul fast <2 x float> %arg0, %add
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ret <2 x float> %tmp1
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}
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define <2 x float> @unsafe_fmul_fsub_distribute_fast_v2f32(<2 x float> %arg0, <2 x float> %arg1) #0 {
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; FMA-LABEL: unsafe_fmul_fsub_distribute_fast_v2f32:
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; FMA: ; %bb.0:
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; FMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; FMA-NEXT: v_fma_f32 v0, -v2, v0, v0
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; FMA-NEXT: v_fma_f32 v1, -v3, v1, v1
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; FMA-NEXT: s_setpc_b64 s[30:31]
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;
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; NOFUSE-LABEL: unsafe_fmul_fsub_distribute_fast_v2f32:
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; NOFUSE: ; %bb.0:
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; NOFUSE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; NOFUSE-NEXT: v_sub_f32_e32 v3, 1.0, v3
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; NOFUSE-NEXT: v_sub_f32_e32 v2, 1.0, v2
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; NOFUSE-NEXT: v_mul_f32_e32 v0, v0, v2
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; NOFUSE-NEXT: v_mul_f32_e32 v1, v1, v3
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; NOFUSE-NEXT: s_setpc_b64 s[30:31]
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;
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; FMAGFX10-LABEL: unsafe_fmul_fsub_distribute_fast_v2f32:
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; FMAGFX10: ; %bb.0:
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; FMAGFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; FMAGFX10-NEXT: s_waitcnt_vscnt null, 0x0
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; FMAGFX10-NEXT: v_fmac_f32_e64 v0, -v2, v0
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; FMAGFX10-NEXT: v_fmac_f32_e64 v1, -v3, v1
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; FMAGFX10-NEXT: s_setpc_b64 s[30:31]
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;
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; FMAD-LABEL: unsafe_fmul_fsub_distribute_fast_v2f32:
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; FMAD: ; %bb.0:
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; FMAD-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; FMAD-NEXT: v_mad_f32 v0, -v2, v0, v0
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; FMAD-NEXT: v_mad_f32 v1, -v3, v1, v1
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; FMAD-NEXT: s_setpc_b64 s[30:31]
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;
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; FMADGFX10-LABEL: unsafe_fmul_fsub_distribute_fast_v2f32:
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; FMADGFX10: ; %bb.0:
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; FMADGFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; FMADGFX10-NEXT: s_waitcnt_vscnt null, 0x0
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; FMADGFX10-NEXT: v_fmac_f32_e64 v0, -v2, v0
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; FMADGFX10-NEXT: v_fmac_f32_e64 v1, -v3, v1
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; FMADGFX10-NEXT: s_setpc_b64 s[30:31]
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%add = fsub fast <2 x float> <float 1.0, float 1.0>, %arg1
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%tmp1 = fmul fast <2 x float> %arg0, %add
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ret <2 x float> %tmp1
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}
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define <2 x float> @unsafe_fast_fmul_fadd_distribute_post_legalize_f32(float %arg0, <2 x float> %arg1) #0 {
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; FMA-LABEL: unsafe_fast_fmul_fadd_distribute_post_legalize_f32:
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; FMA: ; %bb.0:
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; FMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; FMA-NEXT: v_fma_f32 v0, v0, v1, v1
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; FMA-NEXT: s_setpc_b64 s[30:31]
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;
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; NOFUSE-LABEL: unsafe_fast_fmul_fadd_distribute_post_legalize_f32:
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; NOFUSE: ; %bb.0:
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; NOFUSE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; NOFUSE-NEXT: v_add_f32_e32 v0, 1.0, v0
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; NOFUSE-NEXT: v_mul_f32_e32 v0, v1, v0
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; NOFUSE-NEXT: s_setpc_b64 s[30:31]
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;
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; FMAGFX10-LABEL: unsafe_fast_fmul_fadd_distribute_post_legalize_f32:
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; FMAGFX10: ; %bb.0:
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; FMAGFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; FMAGFX10-NEXT: s_waitcnt_vscnt null, 0x0
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; FMAGFX10-NEXT: v_fma_f32 v0, v0, v1, v1
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; FMAGFX10-NEXT: s_setpc_b64 s[30:31]
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;
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; FMAD-LABEL: unsafe_fast_fmul_fadd_distribute_post_legalize_f32:
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; FMAD: ; %bb.0:
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; FMAD-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; FMAD-NEXT: v_mad_f32 v0, v0, v1, v1
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; FMAD-NEXT: s_setpc_b64 s[30:31]
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;
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; FMADGFX10-LABEL: unsafe_fast_fmul_fadd_distribute_post_legalize_f32:
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; FMADGFX10: ; %bb.0:
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; FMADGFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; FMADGFX10-NEXT: s_waitcnt_vscnt null, 0x0
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; FMADGFX10-NEXT: v_mad_f32 v0, v0, v1, v1
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; FMADGFX10-NEXT: s_setpc_b64 s[30:31]
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%add = fadd fast float %arg0, 1.0
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%splat = insertelement <2 x float> undef, float %add, i32 0
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%tmp1 = fmul fast <2 x float> %arg1, %splat
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ret <2 x float> %tmp1
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}
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define <2 x float> @unsafe_fast_fmul_fsub_ditribute_post_legalize(float %arg0, <2 x float> %arg1) #0 {
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; FMA-LABEL: unsafe_fast_fmul_fsub_ditribute_post_legalize:
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; FMA: ; %bb.0:
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; FMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; FMA-NEXT: v_fma_f32 v0, -v0, v1, v1
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; FMA-NEXT: s_setpc_b64 s[30:31]
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;
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; NOFUSE-LABEL: unsafe_fast_fmul_fsub_ditribute_post_legalize:
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; NOFUSE: ; %bb.0:
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; NOFUSE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; NOFUSE-NEXT: v_sub_f32_e32 v0, 1.0, v0
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; NOFUSE-NEXT: v_mul_f32_e32 v0, v1, v0
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; NOFUSE-NEXT: s_setpc_b64 s[30:31]
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;
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; FMAGFX10-LABEL: unsafe_fast_fmul_fsub_ditribute_post_legalize:
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; FMAGFX10: ; %bb.0:
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; FMAGFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; FMAGFX10-NEXT: s_waitcnt_vscnt null, 0x0
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; FMAGFX10-NEXT: v_fma_f32 v0, v1, -v0, v1
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; FMAGFX10-NEXT: s_setpc_b64 s[30:31]
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;
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; FMAD-LABEL: unsafe_fast_fmul_fsub_ditribute_post_legalize:
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; FMAD: ; %bb.0:
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; FMAD-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; FMAD-NEXT: v_mad_f32 v0, -v0, v1, v1
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; FMAD-NEXT: s_setpc_b64 s[30:31]
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;
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; FMADGFX10-LABEL: unsafe_fast_fmul_fsub_ditribute_post_legalize:
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; FMADGFX10: ; %bb.0:
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; FMADGFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; FMADGFX10-NEXT: s_waitcnt_vscnt null, 0x0
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; FMADGFX10-NEXT: v_mad_f32 v0, -v0, v1, v1
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; FMADGFX10-NEXT: s_setpc_b64 s[30:31]
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%sub = fsub fast float 1.0, %arg0
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%splat = insertelement <2 x float> undef, float %sub, i32 0
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%tmp1 = fmul fast <2 x float> %arg1, %splat
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ret <2 x float> %tmp1
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}
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attributes #0 = { "no-infs-fp-math"="true" "unsafe-fp-math"="true" }
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