forked from OSchip/llvm-project
288 lines
12 KiB
LLVM
288 lines
12 KiB
LLVM
; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -enable-var-scope --check-prefixes=GCN,SI %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -enable-var-scope --check-prefixes=GCN,GFX89 %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=gfx900 -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -enable-var-scope --check-prefixes=GCN,GFX89 %s
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declare half @llvm.copysign.f16(half, half)
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declare float @llvm.copysign.f32(float, float)
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declare double @llvm.copysign.f64(double, double)
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declare <2 x half> @llvm.copysign.v2f16(<2 x half>, <2 x half>)
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declare <3 x half> @llvm.copysign.v3f16(<3 x half>, <3 x half>)
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declare <4 x half> @llvm.copysign.v4f16(<4 x half>, <4 x half>)
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declare i32 @llvm.amdgcn.workitem.id.x()
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; GCN-LABEL: {{^}}test_copysign_f16:
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; SI: {{buffer|flat}}_load_ushort v[[MAG:[0-9]+]]
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; SI: {{buffer|flat}}_load_ushort v[[SIGN:[0-9]+]]
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; SI: s_brev_b32 s[[CONST:[0-9]+]], -2
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; SI-DAG: v_cvt_f32_f16_e32 v[[MAG_F32:[0-9]+]], v[[MAG]]
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; SI-DAG: v_cvt_f32_f16_e32 v[[SIGN_F32:[0-9]+]], v[[SIGN]]
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; SI: v_bfi_b32 v[[OUT_F32:[0-9]+]], s[[CONST]], v[[MAG_F32]], v[[SIGN_F32]]
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; SI: v_cvt_f16_f32_e32 v[[OUT:[0-9]+]], v[[OUT_F32]]
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; GFX89: {{buffer|flat}}_load_ushort v[[MAG:[0-9]+]]
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; GFX89: {{buffer|flat}}_load_ushort v[[SIGN:[0-9]+]]
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; GFX89: s_movk_i32 s[[CONST:[0-9]+]], 0x7fff
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; GFX89: v_bfi_b32 v[[OUT:[0-9]+]], s[[CONST]], v[[MAG]], v[[SIGN]]
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; GCN: buffer_store_short v[[OUT]]
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; GCN: s_endpgm
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define amdgpu_kernel void @test_copysign_f16(
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half addrspace(1)* %arg_out,
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half addrspace(1)* %arg_mag,
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half addrspace(1)* %arg_sign) {
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entry:
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%mag = load volatile half, half addrspace(1)* %arg_mag
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%sign = load volatile half, half addrspace(1)* %arg_sign
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%out = call half @llvm.copysign.f16(half %mag, half %sign)
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store half %out, half addrspace(1)* %arg_out
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ret void
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}
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; GCN-LABEL: {{^}}test_copysign_out_f32_mag_f16_sign_f32:
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; GCN-DAG: {{buffer|flat|global}}_load_ushort v[[MAG:[0-9]+]]
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; GCN-DAG: {{buffer|flat|global}}_load_dword v[[SIGN:[0-9]+]]
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; GCN-DAG: s_brev_b32 s[[CONST:[0-9]+]], -2
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; GCN-DAG: v_cvt_f32_f16_e32 v[[MAG_EXT:[0-9]+]], v[[MAG]]
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; GCN: v_bfi_b32 v[[OUT:[0-9]+]], s[[CONST]], v[[MAG_EXT]], v[[SIGN]]
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; GCN: buffer_store_dword v[[OUT]]
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; GCN: s_endpgm
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define amdgpu_kernel void @test_copysign_out_f32_mag_f16_sign_f32(
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float addrspace(1)* %arg_out,
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half addrspace(1)* %arg_mag,
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float addrspace(1)* %arg_sign) {
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entry:
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%arg_mag_gep = getelementptr half, half addrspace(1)* %arg_mag, i32 %tid
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%mag = load half, half addrspace(1)* %arg_mag_gep
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%mag.ext = fpext half %mag to float
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%arg_sign_gep = getelementptr float, float addrspace(1)* %arg_sign, i32 %tid
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%sign = load float, float addrspace(1)* %arg_sign_gep
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%out = call float @llvm.copysign.f32(float %mag.ext, float %sign)
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store float %out, float addrspace(1)* %arg_out
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ret void
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}
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; GCN-LABEL: {{^}}test_copysign_out_f64_mag_f16_sign_f64:
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; GCN-DAG: {{buffer|flat|global}}_load_ushort v[[MAG:[0-9]+]]
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; GCN-DAG: {{buffer|flat|global}}_load_dwordx2 v{{\[}}[[SIGN_LO:[0-9]+]]:[[SIGN_HI:[0-9]+]]{{\]}}
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; GCN-DAG: s_brev_b32 s[[CONST:[0-9]+]], -2
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; GCN-DAG: v_cvt_f32_f16_e32 v[[MAG_EXT:[0-9]+]], v[[MAG]]
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; GCN-DAG: v_cvt_f64_f32_e32 v{{\[}}[[MAG_EXT_LO:[0-9]+]]:[[MAG_EXT_HI:[0-9]+]]{{\]}}, v[[MAG_EXT]]
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; GCN: v_bfi_b32 v[[OUT_HI:[0-9]+]], s[[CONST]], v[[MAG_EXT_HI]], v[[SIGN_HI]]
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; GCN: buffer_store_dwordx2 v{{\[}}[[MAG_EXT_LO]]:[[OUT_HI]]{{\]}}
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; GCN: s_endpgm
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define amdgpu_kernel void @test_copysign_out_f64_mag_f16_sign_f64(
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double addrspace(1)* %arg_out,
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half addrspace(1)* %arg_mag,
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double addrspace(1)* %arg_sign) {
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entry:
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%arg_mag_gep = getelementptr half, half addrspace(1)* %arg_mag, i32 %tid
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%mag = load half, half addrspace(1)* %arg_mag_gep
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%mag.ext = fpext half %mag to double
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%arg_sign_gep = getelementptr double, double addrspace(1)* %arg_sign, i32 %tid
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%sign = load double, double addrspace(1)* %arg_sign_gep
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%out = call double @llvm.copysign.f64(double %mag.ext, double %sign)
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store double %out, double addrspace(1)* %arg_out
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ret void
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}
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; GCN-LABEL: {{^}}test_copysign_out_f32_mag_f32_sign_f16:
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; GCN-DAG: {{buffer|flat|global}}_load_dword v[[MAG:[0-9]+]]
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; GCN-DAG: {{buffer|flat|global}}_load_ushort v[[SIGN:[0-9]+]]
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; GCN-DAG: s_brev_b32 s[[CONST:[0-9]+]], -2
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; SI-DAG: v_cvt_f32_f16_e32 v[[SIGN_F32:[0-9]+]], v[[SIGN]]
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; SI: v_bfi_b32 v[[OUT:[0-9]+]], s[[CONST]], v[[MAG]], v[[SIGN_F32]]
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; GFX89-DAG: v_lshlrev_b32_e32 v[[SIGN_SHIFT:[0-9]+]], 16, v[[SIGN]]
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; GFX89: v_bfi_b32 v[[OUT:[0-9]+]], s[[CONST]], v[[MAG]], v[[SIGN_SHIFT]]
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; GCN: buffer_store_dword v[[OUT]]
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; GCN: s_endpgm
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define amdgpu_kernel void @test_copysign_out_f32_mag_f32_sign_f16(
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float addrspace(1)* %arg_out,
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float addrspace(1)* %arg_mag,
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half addrspace(1)* %arg_sign) {
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entry:
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%arg_mag_gep = getelementptr float, float addrspace(1)* %arg_mag, i32 %tid
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%mag = load float, float addrspace(1)* %arg_mag_gep
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%arg_sign_gep = getelementptr half, half addrspace(1)* %arg_sign, i32 %tid
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%sign = load half, half addrspace(1)* %arg_sign_gep
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%sign.ext = fpext half %sign to float
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%out = call float @llvm.copysign.f32(float %mag, float %sign.ext)
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store float %out, float addrspace(1)* %arg_out
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ret void
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}
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; GCN-LABEL: {{^}}test_copysign_out_f64_mag_f64_sign_f16:
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; GCN-DAG: {{buffer|flat|global}}_load_dwordx2 v{{\[}}[[MAG_LO:[0-9]+]]:[[MAG_HI:[0-9]+]]{{\]}}
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; GCN-DAG: {{buffer|flat|global}}_load_ushort v[[SIGN:[0-9]+]]
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; GCN-DAG: s_brev_b32 s[[CONST:[0-9]+]], -2
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; SI-DAG: v_cvt_f32_f16_e32 v[[SIGN_F32:[0-9]+]], v[[SIGN]]
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; SI: v_bfi_b32 v[[OUT_HI:[0-9]+]], s[[CONST]], v[[MAG_HI]], v[[SIGN_F32]]
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; GFX89-DAG: v_lshlrev_b32_e32 v[[SIGN_SHIFT:[0-9]+]], 16, v[[SIGN]]
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; GFX89: v_bfi_b32 v[[OUT_HI:[0-9]+]], s[[CONST]], v[[MAG_HI]], v[[SIGN_SHIFT]]
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; GCN: buffer_store_dwordx2 v{{\[}}[[MAG_LO]]:[[OUT_HI]]{{\]}}
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; GCN: s_endpgm
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define amdgpu_kernel void @test_copysign_out_f64_mag_f64_sign_f16(
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double addrspace(1)* %arg_out,
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double addrspace(1)* %arg_mag,
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half addrspace(1)* %arg_sign) {
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entry:
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%arg_mag_gep = getelementptr double, double addrspace(1)* %arg_mag, i32 %tid
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%mag = load double, double addrspace(1)* %arg_mag_gep
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%arg_sign_gep = getelementptr half, half addrspace(1)* %arg_sign, i32 %tid
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%sign = load half, half addrspace(1)* %arg_sign_gep
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%sign.ext = fpext half %sign to double
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%out = call double @llvm.copysign.f64(double %mag, double %sign.ext)
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store double %out, double addrspace(1)* %arg_out
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ret void
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}
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; GCN-LABEL: {{^}}test_copysign_out_f16_mag_f16_sign_f32:
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; GCN-DAG: {{buffer|flat|global}}_load_ushort v[[MAG:[0-9]+]]
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; GCN-DAG: {{buffer|flat|global}}_load_dword v[[SIGN:[0-9]+]]
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; SI-DAG: s_brev_b32 s[[CONST:[0-9]+]], -2
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; SI-DAG: v_cvt_f32_f16_e32 v[[MAG_F32:[0-9]+]], v[[MAG]]
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; SI: v_bfi_b32 v[[OUT_F32:[0-9]+]], s[[CONST]], v[[MAG_F32]], v[[SIGN]]
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; SI: v_cvt_f16_f32_e32 v[[OUT:[0-9]+]], v[[OUT_F32]]
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; GFX89-DAG: s_movk_i32 s[[CONST:[0-9]+]], 0x7fff
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; GFX89-DAG: v_lshrrev_b32_e32 v[[SIGN_SHIFT:[0-9]+]], 16, v[[SIGN]]
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; GFX89: v_bfi_b32 v[[OUT:[0-9]+]], s[[CONST]], v[[MAG]], v[[SIGN_SHIFT]]
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; GCN: buffer_store_short v[[OUT]]
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; GCN: s_endpgm
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define amdgpu_kernel void @test_copysign_out_f16_mag_f16_sign_f32(
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half addrspace(1)* %arg_out,
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half addrspace(1)* %arg_mag,
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float addrspace(1)* %arg_sign) {
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entry:
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%arg_mag_gep = getelementptr half, half addrspace(1)* %arg_mag, i32 %tid
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%mag = load half, half addrspace(1)* %arg_mag_gep
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%arg_sign_gep = getelementptr float, float addrspace(1)* %arg_sign, i32 %tid
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%sign = load float, float addrspace(1)* %arg_sign_gep
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%sign.trunc = fptrunc float %sign to half
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%out = call half @llvm.copysign.f16(half %mag, half %sign.trunc)
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store half %out, half addrspace(1)* %arg_out
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ret void
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}
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; GCN-LABEL: {{^}}test_copysign_out_f16_mag_f16_sign_f64:
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; GCN-DAG: {{buffer|flat|global}}_load_ushort v[[MAG:[0-9]+]]
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; GCN-DAG: {{buffer|flat|global}}_load_dwordx2 v{{\[}}[[SIGN_LO:[0-9]+]]:[[SIGN_HI:[0-9]+]]{{\]}}
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; SI-DAG: s_brev_b32 s[[CONST:[0-9]+]], -2
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; SI-DAG: v_cvt_f32_f16_e32 v[[MAG_F32:[0-9]+]], v[[MAG]]
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; SI: v_bfi_b32 v[[OUT_F32:[0-9]+]], s[[CONST]], v[[MAG_F32]], v[[SIGN_HI]]
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; SI: v_cvt_f16_f32_e32 v[[OUT:[0-9]+]], v[[OUT_F32]]
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; GFX89-DAG: s_movk_i32 s[[CONST:[0-9]+]], 0x7fff
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; GFX89-DAG: v_lshrrev_b32_e32 v[[SIGN_SHIFT:[0-9]+]], 16, v[[SIGN_HI]]
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; GFX89: v_bfi_b32 v[[OUT:[0-9]+]], s[[CONST]], v[[MAG]], v[[SIGN_SHIFT]]
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; GCN: buffer_store_short v[[OUT]]
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; GCN: s_endpgm
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define amdgpu_kernel void @test_copysign_out_f16_mag_f16_sign_f64(
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half addrspace(1)* %arg_out,
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half addrspace(1)* %arg_mag,
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double addrspace(1)* %arg_sign) {
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entry:
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%arg_mag_gep = getelementptr half, half addrspace(1)* %arg_mag, i32 %tid
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%mag = load half, half addrspace(1)* %arg_mag
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%arg_sign_gep = getelementptr double, double addrspace(1)* %arg_sign, i32 %tid
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%sign = load double, double addrspace(1)* %arg_sign_gep
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%sign.trunc = fptrunc double %sign to half
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%out = call half @llvm.copysign.f16(half %mag, half %sign.trunc)
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store half %out, half addrspace(1)* %arg_out
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ret void
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}
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; GCN-LABEL: {{^}}test_copysign_out_f16_mag_f32_sign_f16:
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; GCN-DAG: {{buffer|flat|global}}_load_dword v[[MAG:[0-9]+]]
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; GCN-DAG: {{buffer|flat|global}}_load_ushort v[[SIGN:[0-9]+]]
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; SI-DAG: s_brev_b32 s[[CONST:[0-9]+]], -2
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; SI-DAG: v_cvt_f16_f32_e32 v[[MAG_TRUNC:[0-9]+]], v[[MAG]]
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; SI-DAG: v_cvt_f32_f16_e32 v[[SIGN_F32:[0-9]+]], v[[SIGN]]
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; SI-DAG: v_cvt_f32_f16_e32 v[[MAG_F32:[0-9]+]], v[[MAG_TRUNC]]
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; SI: v_bfi_b32 v[[OUT_F32:[0-9]+]], s[[CONST]], v[[MAG_F32]], v[[SIGN_F32]]
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; SI: v_cvt_f16_f32_e32 v[[OUT:[0-9]+]], v[[OUT_F32]]
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; GFX89-DAG: s_movk_i32 s[[CONST:[0-9]+]], 0x7fff
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; GFX89-DAG: v_cvt_f16_f32_e32 v[[MAG_TRUNC:[0-9]+]], v[[MAG]]
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; GFX89: v_bfi_b32 v[[OUT:[0-9]+]], s[[CONST]], v[[MAG_TRUNC]], v[[SIGN]]
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; GCN: buffer_store_short v[[OUT]]
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; GCN: s_endpgm
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define amdgpu_kernel void @test_copysign_out_f16_mag_f32_sign_f16(
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half addrspace(1)* %arg_out,
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float addrspace(1)* %arg_mag,
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half addrspace(1)* %arg_sign) {
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entry:
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%arg_mag_gep = getelementptr float, float addrspace(1)* %arg_mag, i32 %tid
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%mag = load float, float addrspace(1)* %arg_mag_gep
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%mag.trunc = fptrunc float %mag to half
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%arg_sign_gep = getelementptr half, half addrspace(1)* %arg_sign, i32 %tid
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%sign = load half, half addrspace(1)* %arg_sign_gep
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%out = call half @llvm.copysign.f16(half %mag.trunc, half %sign)
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store half %out, half addrspace(1)* %arg_out
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ret void
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}
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; GCN-LABEL: {{^}}test_copysign_out_f16_mag_f64_sign_f16:
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; GCN: v_bfi_b32
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; GCN: s_endpgm
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define amdgpu_kernel void @test_copysign_out_f16_mag_f64_sign_f16(
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half addrspace(1)* %arg_out,
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double addrspace(1)* %arg_mag,
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half addrspace(1)* %arg_sign) {
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entry:
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%mag = load double, double addrspace(1)* %arg_mag
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%mag.trunc = fptrunc double %mag to half
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%sign = load half, half addrspace(1)* %arg_sign
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%out = call half @llvm.copysign.f16(half %mag.trunc, half %sign)
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store half %out, half addrspace(1)* %arg_out
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ret void
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}
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; GCN-LABEL: {{^}}test_copysign_v2f16:
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; GCN: v_bfi_b32
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; GCN: v_bfi_b32
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; VI: v_or_b32_sdwa v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
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; GCN: s_endpgm
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define amdgpu_kernel void @test_copysign_v2f16(
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<2 x half> addrspace(1)* %arg_out,
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<2 x half> %arg_mag,
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<2 x half> %arg_sign) {
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entry:
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%out = call <2 x half> @llvm.copysign.v2f16(<2 x half> %arg_mag, <2 x half> %arg_sign)
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store <2 x half> %out, <2 x half> addrspace(1)* %arg_out
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ret void
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}
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; GCN-LABEL: {{^}}test_copysign_v3f16:
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; GCN: v_bfi_b32
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; GCN: v_bfi_b32
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; GCN: v_bfi_b32
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; GCN: s_endpgm
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define amdgpu_kernel void @test_copysign_v3f16(
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<3 x half> addrspace(1)* %arg_out,
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<3 x half> %arg_mag,
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<3 x half> %arg_sign) {
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entry:
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%out = call <3 x half> @llvm.copysign.v3f16(<3 x half> %arg_mag, <3 x half> %arg_sign)
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store <3 x half> %out, <3 x half> addrspace(1)* %arg_out
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ret void
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}
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; GCN-LABEL: {{^}}test_copysign_v4f16:
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; GCN: v_bfi_b32
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; GCN: v_bfi_b32
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; GCN: v_bfi_b32
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; GCN: v_bfi_b32
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; GCN: s_endpgm
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define amdgpu_kernel void @test_copysign_v4f16(
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<4 x half> addrspace(1)* %arg_out,
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<4 x half> %arg_mag,
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<4 x half> %arg_sign) {
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entry:
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%out = call <4 x half> @llvm.copysign.v4f16(<4 x half> %arg_mag, <4 x half> %arg_sign)
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store <4 x half> %out, <4 x half> addrspace(1)* %arg_out
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ret void
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}
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