llvm-project/llvm/test/CodeGen
Thomas Lively 14ca2e5e22 [WebAssembly] Mark abs of v2i64 as legal
We previously had an ISel pattern for i64x2.abs, but because the ISDNode was not
marked legal for v2i64, the instruction was not being selected.

Differential Revision: https://reviews.llvm.org/D101803
2021-05-04 13:25:32 -07:00
..
AArch64 [AArch64][SVE] Fold insert(zero, extract(X, 0), 0) -> X, when X is known to zero lanes 1-N 2021-05-04 15:05:05 +01:00
AMDGPU DAG: Cleanup assertion in EmitFuncArgumentDbgValue 2021-05-04 21:48:58 +05:30
ARC
ARM Recommit "[VP,Integer,#2] ExpandVectorPredication pass" 2021-05-04 11:47:52 +02:00
AVR
BPF BPF: generate BTF info for LD_imm64 loaded function pointer 2021-04-26 17:23:36 -07:00
Generic Recommit "[VP,Integer,#2] ExpandVectorPredication pass" 2021-05-04 11:47:52 +02:00
Hexagon [Hexagon][test] Migrate llvm-objdump --mv6[0567]t?/--mhvx to --mcpu=hexagonv*/--mattr=+hvx 2021-05-04 11:00:01 -07:00
Inputs
Lanai
M68k
MIR [AMDGPU] Set implicit arg attributes for indirect calls 2021-04-13 13:15:13 +00:00
MSP430
Mips [MIPS, test] Fix use of undef FileCheck var 2021-04-02 00:59:49 +01:00
NVPTX [NVPTX] Enable lowering of atomics on local memory 2021-04-26 20:12:12 -04:00
PowerPC [PowerPC] Prevent argument promotion of types with size greater than 128 bits 2021-05-04 12:09:25 -05:00
RISCV [ValueTypes] Add MVTs for v256i16 and v256f16 2021-05-04 18:06:13 +01:00
SPARC
SystemZ
Thumb Support {S,U}REMEqFold before legalization 2021-04-01 01:35:41 +03:00
Thumb2 [SimplifyCFG] Look for control flow changes instead of side effects. 2021-05-03 13:32:22 -07:00
VE
WebAssembly [WebAssembly] Mark abs of v2i64 as legal 2021-05-04 13:25:32 -07:00
WinCFGuard
WinEH
X86 [X86] Update PR20841 test description to make it clear we SHOULDN'T be folding EFLAGS with XADD 2021-05-04 13:29:19 +01:00
XCore