forked from OSchip/llvm-project
353 lines
19 KiB
Python
353 lines
19 KiB
Python
#!/usr/bin/python
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#===-- x86_64_qemu_target_definition.py -----------------------------*- C++ -*-===//
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#
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# The LLVM Compiler Infrastructure
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#
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# This file is distributed under the University of Illinois Open Source
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# License. See LICENSE.TXT for details.
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#
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#===----------------------------------------------------------------------===//
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#----------------------------------------------------------------------
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# DESCRIPTION
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#
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# This file can be used with the following setting:
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# plugin.process.gdb-remote.target-definition-file
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# This setting should be used when you are trying to connect to a
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# remote GDB server that doesn't support any of the register discovery
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# packets that LLDB normally uses.
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#
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# Why is this necessary? LLDB doesn't require a new build of LLDB that
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# targets each new architecture you will debug with. Instead, all
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# architectures are supported and LLDB relies on extra GDB server
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# packets to discover the target we are connecting to so that is can
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# show the right registers for each target. This allows the remote stub
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# to change and add new registers without requiring a new LLDB build
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# just so we can see new registers.
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#
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# This file implements the x86_64 registers for the user mode qemu on linux.
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# The only difference with the Linux file is the absense of orig_rax register.
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#
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# USAGE
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#
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# (lldb) settings set plugin.process.gdb-remote.target-definition-file /path/to/x86_64_qemu_target_definition.py
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# (lldb) gdb-remote other.baz.com:1234
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#
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# The target definition file will get used if and only if the
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# qRegisterInfo packets are not supported when connecting to a remote
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# GDB stub.
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#----------------------------------------------------------------------
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from lldb import *
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# Compiler and DWARF register numbers
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name_to_gcc_dwarf_regnum = {
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'rax' : 0 ,
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'rdx' : 1 ,
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'rcx' : 2 ,
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'rbx' : 3 ,
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'rsi' : 4 ,
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'rdi' : 5 ,
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'rbp' : 6 ,
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'rsp' : 7 ,
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'r8' : 8 ,
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'r9' : 9 ,
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'r10' : 10,
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'r11' : 11,
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'r12' : 12,
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'r13' : 13,
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'r14' : 14,
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'r15' : 15,
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'rip' : 16,
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'xmm0' : 17,
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'xmm1' : 18,
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'xmm2' : 19,
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'xmm3' : 20,
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'xmm4' : 21,
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'xmm5' : 22,
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'xmm6' : 23,
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'xmm7' : 24,
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'xmm8' : 25,
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'xmm9' : 26,
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'xmm10' : 27,
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'xmm11' : 28,
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'xmm12' : 29,
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'xmm13' : 30,
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'xmm14' : 31,
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'xmm15' : 32,
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'stmm0' : 33,
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'stmm1' : 34,
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'stmm2' : 35,
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'stmm3' : 36,
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'stmm4' : 37,
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'stmm5' : 38,
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'stmm6' : 39,
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'stmm7' : 30,
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'ymm0' : 41,
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'ymm1' : 42,
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'ymm2' : 43,
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'ymm3' : 44,
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'ymm4' : 45,
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'ymm5' : 46,
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'ymm6' : 47,
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'ymm7' : 48,
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'ymm8' : 49,
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'ymm9' : 40,
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'ymm10' : 41,
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'ymm11' : 42,
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'ymm12' : 43,
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'ymm13' : 44,
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'ymm14' : 45,
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'ymm15' : 46
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};
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name_to_gdb_regnum = {
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'rax' : 0,
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'rbx' : 1,
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'rcx' : 2,
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'rdx' : 3,
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'rsi' : 4,
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'rdi' : 5,
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'rbp' : 6,
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'rsp' : 7,
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'r8' : 8,
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'r9' : 9,
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'r10' : 10,
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'r11' : 11,
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'r12' : 12,
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'r13' : 13,
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'r14' : 14,
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'r15' : 15,
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'rip' : 16,
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'rflags': 17,
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'cs' : 18,
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'ss' : 19,
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'ds' : 20,
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'es' : 21,
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'fs' : 22,
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'gs' : 23,
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'stmm0' : 24,
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'stmm1' : 25,
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'stmm2' : 26,
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'stmm3' : 27,
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'stmm4' : 28,
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'stmm5' : 29,
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'stmm6' : 30,
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'stmm7' : 31,
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'fctrl' : 32,
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'fstat' : 33,
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'ftag' : 34,
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'fiseg' : 35,
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'fioff' : 36,
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'foseg' : 37,
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'fooff' : 38,
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'fop' : 39,
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'xmm0' : 40,
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'xmm1' : 41,
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'xmm2' : 42,
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'xmm3' : 43,
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'xmm4' : 44,
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'xmm5' : 45,
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'xmm6' : 46,
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'xmm7' : 47,
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'xmm8' : 48,
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'xmm9' : 49,
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'xmm10' : 50,
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'xmm11' : 51,
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'xmm12' : 52,
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'xmm13' : 53,
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'xmm14' : 54,
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'xmm15' : 55,
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'mxcsr' : 56,
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'ymm0' : 57,
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'ymm1' : 58,
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'ymm2' : 59,
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'ymm3' : 60,
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'ymm4' : 61,
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'ymm5' : 62,
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'ymm6' : 63,
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'ymm7' : 64,
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'ymm8' : 65,
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'ymm9' : 66,
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'ymm10' : 67,
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'ymm11' : 68,
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'ymm12' : 69,
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'ymm13' : 70,
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'ymm14' : 71,
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'ymm15' : 72
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};
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name_to_generic_regnum = {
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'rip' : LLDB_REGNUM_GENERIC_PC,
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'rsp' : LLDB_REGNUM_GENERIC_SP,
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'rbp' : LLDB_REGNUM_GENERIC_FP,
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'rdi' : LLDB_REGNUM_GENERIC_ARG1,
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'rsi' : LLDB_REGNUM_GENERIC_ARG2,
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'rdx' : LLDB_REGNUM_GENERIC_ARG3,
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'rcx' : LLDB_REGNUM_GENERIC_ARG4,
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'r8' : LLDB_REGNUM_GENERIC_ARG5,
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'r9' : LLDB_REGNUM_GENERIC_ARG6
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};
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def get_reg_num (reg_num_dict, reg_name):
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if reg_name in reg_num_dict:
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return reg_num_dict[reg_name]
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return LLDB_INVALID_REGNUM
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x86_64_register_infos = [
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{ 'name':'rax' , 'set':0, 'bitsize':64 , 'encoding':eEncodingUint , 'format':eFormatAddressInfo },
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{ 'name':'rbx' , 'set':0, 'bitsize':64 , 'encoding':eEncodingUint , 'format':eFormatAddressInfo },
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{ 'name':'rcx' , 'set':0, 'bitsize':64 , 'encoding':eEncodingUint , 'format':eFormatAddressInfo, 'alt-name':'arg4' },
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{ 'name':'rdx' , 'set':0, 'bitsize':64 , 'encoding':eEncodingUint , 'format':eFormatAddressInfo, 'alt-name':'arg3' },
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{ 'name':'rsi' , 'set':0, 'bitsize':64 , 'encoding':eEncodingUint , 'format':eFormatAddressInfo, 'alt-name':'arg2' },
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{ 'name':'rdi' , 'set':0, 'bitsize':64 , 'encoding':eEncodingUint , 'format':eFormatAddressInfo, 'alt-name':'arg1' },
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{ 'name':'rbp' , 'set':0, 'bitsize':64 , 'encoding':eEncodingUint , 'format':eFormatAddressInfo, 'alt-name':'fp' },
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{ 'name':'rsp' , 'set':0, 'bitsize':64 , 'encoding':eEncodingUint , 'format':eFormatAddressInfo, 'alt-name':'sp' },
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{ 'name':'r8' , 'set':0, 'bitsize':64 , 'encoding':eEncodingUint , 'format':eFormatAddressInfo, 'alt-name':'arg5' },
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{ 'name':'r9' , 'set':0, 'bitsize':64 , 'encoding':eEncodingUint , 'format':eFormatAddressInfo, 'alt-name':'arg6' },
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{ 'name':'r10' , 'set':0, 'bitsize':64 , 'encoding':eEncodingUint , 'format':eFormatAddressInfo },
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{ 'name':'r11' , 'set':0, 'bitsize':64 , 'encoding':eEncodingUint , 'format':eFormatAddressInfo },
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{ 'name':'r12' , 'set':0, 'bitsize':64 , 'encoding':eEncodingUint , 'format':eFormatAddressInfo },
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{ 'name':'r13' , 'set':0, 'bitsize':64 , 'encoding':eEncodingUint , 'format':eFormatAddressInfo },
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{ 'name':'r14' , 'set':0, 'bitsize':64 , 'encoding':eEncodingUint , 'format':eFormatAddressInfo },
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{ 'name':'r15' , 'set':0, 'bitsize':64 , 'encoding':eEncodingUint , 'format':eFormatAddressInfo },
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{ 'name':'rip' , 'set':0, 'bitsize':64 , 'encoding':eEncodingUint , 'format':eFormatAddressInfo, 'alt-name':'pc' },
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{ 'name':'rflags', 'set':0, 'bitsize':32 , 'encoding':eEncodingUint , 'format':eFormatHex },
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{ 'name':'cs' , 'set':0, 'bitsize':32 , 'encoding':eEncodingUint , 'format':eFormatHex },
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{ 'name':'ss' , 'set':0, 'bitsize':32 , 'encoding':eEncodingUint , 'format':eFormatHex },
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{ 'name':'ds' , 'set':0, 'bitsize':32 , 'encoding':eEncodingUint , 'format':eFormatHex },
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{ 'name':'es' , 'set':0, 'bitsize':32 , 'encoding':eEncodingUint , 'format':eFormatHex },
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{ 'name':'fs' , 'set':0, 'bitsize':32 , 'encoding':eEncodingUint , 'format':eFormatHex },
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{ 'name':'gs' , 'set':0, 'bitsize':32 , 'encoding':eEncodingUint , 'format':eFormatHex },
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{ 'name':'stmm0' , 'set':1, 'bitsize':80 , 'encoding':eEncodingVector, 'format':eFormatVectorOfUInt8 },
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{ 'name':'stmm1' , 'set':1, 'bitsize':80 , 'encoding':eEncodingVector, 'format':eFormatVectorOfUInt8 },
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{ 'name':'stmm2' , 'set':1, 'bitsize':80 , 'encoding':eEncodingVector, 'format':eFormatVectorOfUInt8 },
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{ 'name':'stmm3' , 'set':1, 'bitsize':80 , 'encoding':eEncodingVector, 'format':eFormatVectorOfUInt8 },
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{ 'name':'stmm4' , 'set':1, 'bitsize':80 , 'encoding':eEncodingVector, 'format':eFormatVectorOfUInt8 },
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{ 'name':'stmm5' , 'set':1, 'bitsize':80 , 'encoding':eEncodingVector, 'format':eFormatVectorOfUInt8 },
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{ 'name':'stmm6' , 'set':1, 'bitsize':80 , 'encoding':eEncodingVector, 'format':eFormatVectorOfUInt8 },
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{ 'name':'stmm7' , 'set':1, 'bitsize':80 , 'encoding':eEncodingVector, 'format':eFormatVectorOfUInt8 },
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{ 'name':'fctrl' , 'set':1, 'bitsize':32 , 'encoding':eEncodingUint , 'format':eFormatHex },
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{ 'name':'fstat' , 'set':1, 'bitsize':32 , 'encoding':eEncodingUint , 'format':eFormatHex },
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{ 'name':'ftag' , 'set':1, 'bitsize':32 , 'encoding':eEncodingUint , 'format':eFormatHex },
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{ 'name':'fiseg' , 'set':1, 'bitsize':32 , 'encoding':eEncodingUint , 'format':eFormatHex },
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{ 'name':'fioff' , 'set':1, 'bitsize':32 , 'encoding':eEncodingUint , 'format':eFormatHex },
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{ 'name':'foseg' , 'set':1, 'bitsize':32 , 'encoding':eEncodingUint , 'format':eFormatHex },
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{ 'name':'fooff' , 'set':1, 'bitsize':32 , 'encoding':eEncodingUint , 'format':eFormatHex },
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{ 'name':'fop' , 'set':1, 'bitsize':32 , 'encoding':eEncodingUint , 'format':eFormatHex },
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{ 'name':'xmm0' , 'set':1, 'bitsize':128, 'encoding':eEncodingVector, 'format':eFormatVectorOfUInt8 },
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{ 'name':'xmm1' , 'set':1, 'bitsize':128, 'encoding':eEncodingVector, 'format':eFormatVectorOfUInt8 },
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{ 'name':'xmm2' , 'set':1, 'bitsize':128, 'encoding':eEncodingVector, 'format':eFormatVectorOfUInt8 },
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{ 'name':'xmm3' , 'set':1, 'bitsize':128, 'encoding':eEncodingVector, 'format':eFormatVectorOfUInt8 },
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{ 'name':'xmm4' , 'set':1, 'bitsize':128, 'encoding':eEncodingVector, 'format':eFormatVectorOfUInt8 },
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{ 'name':'xmm5' , 'set':1, 'bitsize':128, 'encoding':eEncodingVector, 'format':eFormatVectorOfUInt8 },
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{ 'name':'xmm6' , 'set':1, 'bitsize':128, 'encoding':eEncodingVector, 'format':eFormatVectorOfUInt8 },
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{ 'name':'xmm7' , 'set':1, 'bitsize':128, 'encoding':eEncodingVector, 'format':eFormatVectorOfUInt8 },
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{ 'name':'xmm8' , 'set':1, 'bitsize':128, 'encoding':eEncodingVector, 'format':eFormatVectorOfUInt8 },
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{ 'name':'xmm9' , 'set':1, 'bitsize':128, 'encoding':eEncodingVector, 'format':eFormatVectorOfUInt8 },
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{ 'name':'xmm10' , 'set':1, 'bitsize':128, 'encoding':eEncodingVector, 'format':eFormatVectorOfUInt8 },
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{ 'name':'xmm11' , 'set':1, 'bitsize':128, 'encoding':eEncodingVector, 'format':eFormatVectorOfUInt8 },
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{ 'name':'xmm12' , 'set':1, 'bitsize':128, 'encoding':eEncodingVector, 'format':eFormatVectorOfUInt8 },
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{ 'name':'xmm13' , 'set':1, 'bitsize':128, 'encoding':eEncodingVector, 'format':eFormatVectorOfUInt8 },
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{ 'name':'xmm14' , 'set':1, 'bitsize':128, 'encoding':eEncodingVector, 'format':eFormatVectorOfUInt8 },
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{ 'name':'xmm15' , 'set':1, 'bitsize':128, 'encoding':eEncodingVector, 'format':eFormatVectorOfUInt8 },
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{ 'name':'mxcsr' , 'set':1, 'bitsize':32 , 'encoding':eEncodingUint , 'format':eFormatHex },
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# Registers that are contained in or composed of one of more other registers
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{ 'name':'eax' , 'set':0, 'bitsize':32 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'rax[31:0]' },
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{ 'name':'ebx' , 'set':0, 'bitsize':32 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'rbx[31:0]' },
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{ 'name':'ecx' , 'set':0, 'bitsize':32 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'rcx[31:0]' },
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{ 'name':'edx' , 'set':0, 'bitsize':32 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'rdx[31:0]' },
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{ 'name':'edi' , 'set':0, 'bitsize':32 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'rdi[31:0]' },
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{ 'name':'esi' , 'set':0, 'bitsize':32 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'rsi[31:0]' },
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{ 'name':'ebp' , 'set':0, 'bitsize':32 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'rbp[31:0]' },
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{ 'name':'esp' , 'set':0, 'bitsize':32 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'rsp[31:0]' },
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{ 'name':'r8d' , 'set':0, 'bitsize':32 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'r8[31:0]' },
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{ 'name':'r9d' , 'set':0, 'bitsize':32 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'r9[31:0]' },
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{ 'name':'r10d' , 'set':0, 'bitsize':32 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'r10[31:0]' },
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{ 'name':'r11d' , 'set':0, 'bitsize':32 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'r11[31:0]' },
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{ 'name':'r12d' , 'set':0, 'bitsize':32 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'r12[31:0]' },
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{ 'name':'r13d' , 'set':0, 'bitsize':32 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'r13[31:0]' },
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{ 'name':'r14d' , 'set':0, 'bitsize':32 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'r14[31:0]' },
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{ 'name':'r15d' , 'set':0, 'bitsize':32 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'r15[31:0]' },
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{ 'name':'ax' , 'set':0, 'bitsize':16 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'rax[15:0]' },
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{ 'name':'bx' , 'set':0, 'bitsize':16 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'rbx[15:0]' },
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{ 'name':'cx' , 'set':0, 'bitsize':16 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'rcx[15:0]' },
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{ 'name':'dx' , 'set':0, 'bitsize':16 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'rdx[15:0]' },
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{ 'name':'di' , 'set':0, 'bitsize':16 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'rdi[15:0]' },
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{ 'name':'si' , 'set':0, 'bitsize':16 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'rsi[15:0]' },
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{ 'name':'bp' , 'set':0, 'bitsize':16 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'rbp[15:0]' },
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{ 'name':'sp' , 'set':0, 'bitsize':16 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'rsp[15:0]' },
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{ 'name':'r8w' , 'set':0, 'bitsize':16 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'r8[15:0]' },
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{ 'name':'r9w' , 'set':0, 'bitsize':16 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'r9[15:0]' },
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{ 'name':'r10w' , 'set':0, 'bitsize':16 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'r10[15:0]' },
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{ 'name':'r11w' , 'set':0, 'bitsize':16 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'r11[15:0]' },
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{ 'name':'r12w' , 'set':0, 'bitsize':16 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'r12[15:0]' },
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{ 'name':'r13w' , 'set':0, 'bitsize':16 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'r13[15:0]' },
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{ 'name':'r14w' , 'set':0, 'bitsize':16 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'r14[15:0]' },
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{ 'name':'r15w' , 'set':0, 'bitsize':16 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'r15[15:0]' },
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{ 'name':'ah' , 'set':0, 'bitsize':8 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'rax[15:8]' },
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{ 'name':'bh' , 'set':0, 'bitsize':8 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'rbx[15:8]' },
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{ 'name':'ch' , 'set':0, 'bitsize':8 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'rcx[15:8]' },
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{ 'name':'dh' , 'set':0, 'bitsize':8 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'rdx[15:8]' },
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{ 'name':'al' , 'set':0, 'bitsize':8 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'rax[7:0]' },
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{ 'name':'bl' , 'set':0, 'bitsize':8 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'rbx[7:0]' },
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{ 'name':'cl' , 'set':0, 'bitsize':8 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'rcx[7:0]' },
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{ 'name':'dl' , 'set':0, 'bitsize':8 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'rdx[7:0]' },
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{ 'name':'dil' , 'set':0, 'bitsize':8 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'rdi[7:0]' },
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{ 'name':'sil' , 'set':0, 'bitsize':8 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'rsi[7:0]' },
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{ 'name':'bpl' , 'set':0, 'bitsize':8 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'rbp[7:0]' },
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{ 'name':'spl' , 'set':0, 'bitsize':8 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'rsp[7:0]' },
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{ 'name':'r8l' , 'set':0, 'bitsize':8 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'r8[7:0]' },
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{ 'name':'r9l' , 'set':0, 'bitsize':8 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'r9[7:0]' },
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{ 'name':'r10l' , 'set':0, 'bitsize':8 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'r10[7:0]' },
|
|
{ 'name':'r11l' , 'set':0, 'bitsize':8 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'r11[7:0]' },
|
|
{ 'name':'r12l' , 'set':0, 'bitsize':8 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'r12[7:0]' },
|
|
{ 'name':'r13l' , 'set':0, 'bitsize':8 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'r13[7:0]' },
|
|
{ 'name':'r14l' , 'set':0, 'bitsize':8 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'r14[7:0]' },
|
|
{ 'name':'r15l' , 'set':0, 'bitsize':8 , 'encoding':eEncodingUint , 'format':eFormatHex , 'slice': 'r15[7:0]' },
|
|
];
|
|
|
|
g_target_definition = None
|
|
|
|
def get_target_definition ():
|
|
global g_target_definition
|
|
if g_target_definition == None:
|
|
g_target_definition = {}
|
|
offset = 0
|
|
for reg_info in x86_64_register_infos:
|
|
reg_name = reg_info['name']
|
|
|
|
# Only fill in the offset if there is no 'slice' in the register info
|
|
if 'slice' not in reg_info and 'composite' not in reg_info:
|
|
reg_info['offset'] = offset
|
|
offset += reg_info['bitsize']/8
|
|
|
|
# Set the GCC/DWARF register number for this register if it has one
|
|
reg_num = get_reg_num(name_to_gcc_dwarf_regnum, reg_name)
|
|
if reg_num != LLDB_INVALID_REGNUM:
|
|
reg_info['gcc'] = reg_num
|
|
reg_info['dwarf'] = reg_num
|
|
|
|
# Set the generic register number for this register if it has one
|
|
reg_num = get_reg_num(name_to_generic_regnum, reg_name)
|
|
if reg_num != LLDB_INVALID_REGNUM:
|
|
reg_info['generic'] = reg_num
|
|
|
|
# Set the GDB register number for this register if it has one
|
|
reg_num = get_reg_num(name_to_gdb_regnum, reg_name)
|
|
if reg_num != LLDB_INVALID_REGNUM:
|
|
reg_info['gdb'] = reg_num
|
|
|
|
g_target_definition['sets'] = ['General Purpose Registers', 'Floating Point Registers']
|
|
g_target_definition['registers'] = x86_64_register_infos
|
|
g_target_definition['host-info'] = { 'triple' : 'x86_64-*-linux', 'endian': eByteOrderLittle }
|
|
g_target_definition['g-packet-size'] = offset
|
|
g_target_definition['breakpoint-pc-offset'] = -1
|
|
return g_target_definition
|
|
|
|
def get_dynamic_setting(target, setting_name):
|
|
if setting_name == 'gdb-server-target-definition':
|
|
return get_target_definition()
|