forked from OSchip/llvm-project
157 lines
6.2 KiB
ArmAsm
157 lines
6.2 KiB
ArmAsm
# RUN: not llvm-mc -triple=thumbv8.1m.main-none-eabi -mattr=+mve -show-encoding < %s 2>%t \
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# RUN: | FileCheck --check-prefix=CHECK %s
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# RUN: FileCheck --check-prefix=ERROR < %t %s
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# RUN: not llvm-mc -triple=thumbv8.1m.main-none-eabi -mattr=+mve.fp,+fp64 -show-encoding < %s 2>%t \
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# RUN: | FileCheck --check-prefix=CHECK %s
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# RUN: FileCheck --check-prefix=ERROR < %t %s
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# RUN: not llvm-mc -triple=thumbv8.1m.main-none-eabi -show-encoding < %s 2>%t \
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# RUN: | FileCheck --check-prefix=CHECK-NOMVE %s
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# RUN: FileCheck --check-prefix=ERROR-NOMVE < %t %s
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# CHECK: asrl r0, r1, #23 @ encoding: [0x50,0xea,0xef,0x51]
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# ERROR-NOMVE: [[@LINE+1]]:{{[0-9]+}}: error: instruction requires: mve
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asrl r0, r1, #23
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# CHECK: asrl lr, r1, #27 @ encoding: [0x5e,0xea,0xef,0x61]
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# ERROR-NOMVE: [[@LINE+1]]:{{[0-9]+}}: error: instruction requires: mve
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asrl lr, r1, #27
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# CHECK: it eq @ encoding: [0x08,0xbf]
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# CHECK-NEXT: asrleq lr, r1, #27 @ encoding: [0x5e,0xea,0xef,0x61]
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it eq
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asrleq lr, r1, #27
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# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: invalid instruction
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# ERROR-NOMVE: [[@LINE+1]]:{{[0-9]+}}: {{error|note}}: invalid instruction
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asrl r3, r2, #33
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# ERROR: [[@LINE+3]]:{{[0-9]+}}: {{error|note}}: operand must be an immediate in the range [1,32]
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# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: operand must be a register in range [r0, r12] or r14
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# ERROR-NOMVE: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction
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asrl r0, r1, #33
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# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: operand must be an odd-numbered register in range [r1,r11]
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# ERROR-NOMVE: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction
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asrl r0, r0, #32
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# CHECK: asrl r0, r1, r4 @ encoding: [0x50,0xea,0x2d,0x41]
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# ERROR-NOMVE: [[@LINE+1]]:{{[0-9]+}}: error: instruction requires: mve
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asrl r0, r1, r4
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# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: operand must be an odd-numbered register in range [r1,r11]
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# ERROR-NOMVE: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction
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asrl r0, r0, r4
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# The assembler will reject the above shifts when MVE is not supported,
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# so the previous valid instruction will be IT EQ, so we need to add
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# a NOPEQ:
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nopeq
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# CHECK: cinc lr, r2, lo @ encoding: [0x52,0xea,0x22,0x9e]
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# CHECK-NOMVE: cinc lr, r2, lo @ encoding: [0x52,0xea,0x22,0x9e]
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csinc lr, r2, r2, hs
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# CHECK: cinc lr, r7, pl @ encoding: [0x57,0xea,0x47,0x9e]
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# CHECK-NOMVE: cinc lr, r7, pl @ encoding: [0x57,0xea,0x47,0x9e]
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cinc lr, r7, pl
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# CHECK: cinv lr, r12, hs @ encoding: [0x5c,0xea,0x3c,0xae]
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# CHECK-NOMVE: cinv lr, r12, hs @ encoding: [0x5c,0xea,0x3c,0xae]
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cinv lr, r12, hs
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# CHECK: cneg lr, r10, hs @ encoding: [0x5a,0xea,0x3a,0xbe]
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# CHECK-NOMVE: cneg lr, r10, hs @ encoding: [0x5a,0xea,0x3a,0xbe]
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csneg lr, r10, r10, lo
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# CHECK: csel r9, r9, r11, vc @ encoding: [0x59,0xea,0x7b,0x89]
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# CHECK-NOMVE: csel r9, r9, r11, vc @ encoding: [0x59,0xea,0x7b,0x89]
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csel r9, r9, r11, vc
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# CHECK: cset lr, eq @ encoding: [0x5f,0xea,0x1f,0x9e]
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# CHECK-NOMVE: cset lr, eq @ encoding: [0x5f,0xea,0x1f,0x9e]
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cset lr, eq
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# CHECK: csetm lr, hs @ encoding: [0x5f,0xea,0x3f,0xae]
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# CHECK-NOMVE: csetm lr, hs @ encoding: [0x5f,0xea,0x3f,0xae]
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csetm lr, hs
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# CHECK: csinc lr, r10, r7, le @ encoding: [0x5a,0xea,0xd7,0x9e]
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# CHECK-NOMVE: csinc lr, r10, r7, le @ encoding: [0x5a,0xea,0xd7,0x9e]
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csinc lr, r10, r7, le
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# CHECK: csinv lr, r5, zr, hs @ encoding: [0x55,0xea,0x2f,0xae]
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# CHECK-NOMVE: csinv lr, r5, zr, hs @ encoding: [0x55,0xea,0x2f,0xae]
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csinv lr, r5, zr, hs
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# CHECK: cinv lr, r2, pl @ encoding: [0x52,0xea,0x42,0xae]
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# CHECK-NOMVE: cinv lr, r2, pl @ encoding: [0x52,0xea,0x42,0xae]
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csinv lr, r2, r2, mi
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# CHECK: csneg lr, r1, r11, vc @ encoding: [0x51,0xea,0x7b,0xbe]
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# CHECK-NOMVE: csneg lr, r1, r11, vc @ encoding: [0x51,0xea,0x7b,0xbe]
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csneg lr, r1, r11, vc
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# CHECK: lsll lr, r1, #11 @ encoding: [0x5e,0xea,0xcf,0x21]
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# ERROR-NOMVE: [[@LINE+1]]:{{[0-9]+}}: error: instruction requires: mve
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lsll lr, r1, #11
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# CHECK: lsll lr, r1, r4 @ encoding: [0x5e,0xea,0x0d,0x41]
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# ERROR-NOMVE: [[@LINE+1]]:{{[0-9]+}}: error: instruction requires: mve
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lsll lr, r1, r4
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# CHECK: lsrl lr, r1, #12 @ encoding: [0x5e,0xea,0x1f,0x31]
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# ERROR-NOMVE: [[@LINE+1]]:{{[0-9]+}}: error: instruction requires: mve
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lsrl lr, r1, #12
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# CHECK: sqrshr lr, r12 @ encoding: [0x5e,0xea,0x2d,0xcf]
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# ERROR-NOMVE: [[@LINE+1]]:{{[0-9]+}}: error: instruction requires: mve
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sqrshr lr, r12
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# CHECK: sqrshr r11, r12 @ encoding: [0x5b,0xea,0x2d,0xcf]
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# ERROR-NOMVE: [[@LINE+1]]:{{[0-9]+}}: error: instruction requires: mve
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sqrshr r11, r12
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# CHECK: sqrshrl lr, r3, r8 @ encoding: [0x5f,0xea,0x2d,0x83]
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# ERROR-NOMVE: [[@LINE+1]]:{{[0-9]+}}: error: instruction requires: mve
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sqrshrl lr, r3, r8
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# CHECK: sqshl lr, #17 @ encoding: [0x5e,0xea,0x7f,0x4f]
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# ERROR-NOMVE: [[@LINE+1]]:{{[0-9]+}}: error: instruction requires: mve
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sqshl lr, #17
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# CHECK: sqshll lr, r11, #28 @ encoding: [0x5f,0xea,0x3f,0x7b]
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# ERROR-NOMVE: [[@LINE+1]]:{{[0-9]+}}: error: instruction requires: mve
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sqshll lr, r11, #28
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# CHECK: srshr lr, #11 @ encoding: [0x5e,0xea,0xef,0x2f]
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# ERROR-NOMVE: [[@LINE+1]]:{{[0-9]+}}: error: instruction requires: mve
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srshr lr, #11
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# CHECK: srshrl lr, r11, #23 @ encoding: [0x5f,0xea,0xef,0x5b]
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# ERROR-NOMVE: [[@LINE+1]]:{{[0-9]+}}: error: instruction requires: mve
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srshrl lr, r11, #23
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# CHECK: uqrshl lr, r1 @ encoding: [0x5e,0xea,0x0d,0x1f]
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# ERROR-NOMVE: [[@LINE+1]]:{{[0-9]+}}: error: instruction requires: mve
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uqrshl lr, r1
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# CHECK: uqrshll lr, r1, r4 @ encoding: [0x5f,0xea,0x0d,0x41]
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# ERROR-NOMVE: [[@LINE+1]]:{{[0-9]+}}: error: instruction requires: mve
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uqrshll lr, r1, r4
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# CHECK: uqshl r0, #1 @ encoding: [0x50,0xea,0x4f,0x0f]
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# ERROR-NOMVE: [[@LINE+1]]:{{[0-9]+}}: error: instruction requires: mve
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uqshl r0, #1
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# CHECK: uqshll lr, r7, #7 @ encoding: [0x5f,0xea,0xcf,0x17]
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# ERROR-NOMVE: [[@LINE+1]]:{{[0-9]+}}: error: instruction requires: mve
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uqshll lr, r7, #7
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# CHECK: urshr r0, #10 @ encoding: [0x50,0xea,0x9f,0x2f]
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# ERROR-NOMVE: [[@LINE+1]]:{{[0-9]+}}: error: instruction requires: mve
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urshr r0, #10
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# CHECK: urshrl r0, r9, #29 @ encoding: [0x51,0xea,0x5f,0x79]
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# ERROR-NOMVE: [[@LINE+1]]:{{[0-9]+}}: error: instruction requires: mve
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urshrl r0, r9, #29
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