forked from OSchip/llvm-project
26 lines
1.4 KiB
LLVM
26 lines
1.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 -x86-experimental-vector-widening-legalization | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -x86-experimental-vector-widening-legalization | FileCheck %s --check-prefix=X64
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define <4 x i32> @zext_v4i8_to_v4i32(<4 x i8>* %ptr) {
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; X86-LABEL: zext_v4i8_to_v4i32:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; X86-NEXT: pxor %xmm1, %xmm1
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; X86-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
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; X86-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
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; X86-NEXT: retl
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;
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; X64-LABEL: zext_v4i8_to_v4i32:
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; X64: # %bb.0:
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; X64-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; X64-NEXT: pxor %xmm1, %xmm1
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; X64-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
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; X64-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
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; X64-NEXT: retq
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%val = load <4 x i8>, <4 x i8>* %ptr
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%ext = zext <4 x i8> %val to <4 x i32>
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ret <4 x i32> %ext
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}
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