forked from OSchip/llvm-project
129 lines
4.1 KiB
LLVM
129 lines
4.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=CHECK --check-prefix=X32
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=CHECK --check-prefix=X64
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define <2 x i256> @test_shl(<2 x i256> %In) {
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; X32-LABEL: test_shl:
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; X32: # %bb.0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movl $0, 60(%eax)
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; X32-NEXT: movl $0, 56(%eax)
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; X32-NEXT: movl $0, 52(%eax)
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; X32-NEXT: movl $0, 48(%eax)
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; X32-NEXT: movl $0, 44(%eax)
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; X32-NEXT: movl $0, 40(%eax)
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; X32-NEXT: movl $0, 36(%eax)
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; X32-NEXT: movl $0, 32(%eax)
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; X32-NEXT: movl $0, 28(%eax)
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; X32-NEXT: movl $0, 24(%eax)
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; X32-NEXT: movl $0, 20(%eax)
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; X32-NEXT: movl $0, 16(%eax)
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; X32-NEXT: movl $0, 12(%eax)
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; X32-NEXT: movl $0, 8(%eax)
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; X32-NEXT: movl $0, 4(%eax)
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; X32-NEXT: movl $0, (%eax)
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; X32-NEXT: retl $4
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;
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; X64-LABEL: test_shl:
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; X64: # %bb.0:
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; X64-NEXT: xorps %xmm0, %xmm0
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; X64-NEXT: movaps %xmm0, 48(%rdi)
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; X64-NEXT: movaps %xmm0, 32(%rdi)
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; X64-NEXT: movaps %xmm0, 16(%rdi)
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; X64-NEXT: movaps %xmm0, (%rdi)
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; X64-NEXT: movq %rdi, %rax
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; X64-NEXT: retq
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%Amt = insertelement <2 x i256> undef, i256 -1, i32 0
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%Out = shl <2 x i256> %In, %Amt
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ret <2 x i256> %Out
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}
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define <2 x i256> @test_srl(<2 x i256> %In) {
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; X32-LABEL: test_srl:
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; X32: # %bb.0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movl $0, 60(%eax)
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; X32-NEXT: movl $0, 56(%eax)
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; X32-NEXT: movl $0, 52(%eax)
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; X32-NEXT: movl $0, 48(%eax)
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; X32-NEXT: movl $0, 44(%eax)
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; X32-NEXT: movl $0, 40(%eax)
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; X32-NEXT: movl $0, 36(%eax)
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; X32-NEXT: movl $0, 32(%eax)
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; X32-NEXT: movl $0, 28(%eax)
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; X32-NEXT: movl $0, 24(%eax)
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; X32-NEXT: movl $0, 20(%eax)
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; X32-NEXT: movl $0, 16(%eax)
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; X32-NEXT: movl $0, 12(%eax)
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; X32-NEXT: movl $0, 8(%eax)
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; X32-NEXT: movl $0, 4(%eax)
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; X32-NEXT: movl $0, (%eax)
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; X32-NEXT: retl $4
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;
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; X64-LABEL: test_srl:
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; X64: # %bb.0:
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; X64-NEXT: xorps %xmm0, %xmm0
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; X64-NEXT: movaps %xmm0, 48(%rdi)
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; X64-NEXT: movaps %xmm0, 32(%rdi)
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; X64-NEXT: movaps %xmm0, 16(%rdi)
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; X64-NEXT: movaps %xmm0, (%rdi)
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; X64-NEXT: movq %rdi, %rax
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; X64-NEXT: retq
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%Amt = insertelement <2 x i256> undef, i256 -1, i32 0
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%Out = lshr <2 x i256> %In, %Amt
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ret <2 x i256> %Out
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}
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define <2 x i256> @test_sra(<2 x i256> %In) {
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; X32-LABEL: test_sra:
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; X32: # %bb.0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: movl %ecx, 60(%eax)
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: movl %ecx, 56(%eax)
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: movl %ecx, 52(%eax)
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: movl %ecx, 48(%eax)
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: movl %ecx, 44(%eax)
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: movl %ecx, 40(%eax)
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: movl %ecx, 36(%eax)
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: movl %ecx, 32(%eax)
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: sarl $31, %ecx
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; X32-NEXT: movl %ecx, 28(%eax)
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; X32-NEXT: movl %ecx, 24(%eax)
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; X32-NEXT: movl %ecx, 20(%eax)
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; X32-NEXT: movl %ecx, 16(%eax)
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; X32-NEXT: movl %ecx, 12(%eax)
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; X32-NEXT: movl %ecx, 8(%eax)
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; X32-NEXT: movl %ecx, 4(%eax)
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; X32-NEXT: movl %ecx, (%eax)
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; X32-NEXT: retl $4
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;
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; X64-LABEL: test_sra:
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; X64: # %bb.0:
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; X64-NEXT: movq {{[0-9]+}}(%rsp), %rax
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; X64-NEXT: movq {{[0-9]+}}(%rsp), %rcx
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; X64-NEXT: movq {{[0-9]+}}(%rsp), %rdx
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; X64-NEXT: sarq $63, %r8
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; X64-NEXT: movq %rdx, 56(%rdi)
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; X64-NEXT: movq %rcx, 48(%rdi)
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; X64-NEXT: movq %rax, 40(%rdi)
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; X64-NEXT: movq %r9, 32(%rdi)
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; X64-NEXT: movq %r8, 24(%rdi)
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; X64-NEXT: movq %r8, 16(%rdi)
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; X64-NEXT: movq %r8, 8(%rdi)
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; X64-NEXT: movq %r8, (%rdi)
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; X64-NEXT: movq %rdi, %rax
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; X64-NEXT: retq
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%Amt = insertelement <2 x i256> undef, i256 -1, i32 0
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%Out = ashr <2 x i256> %In, %Amt
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ret <2 x i256> %Out
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}
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