forked from OSchip/llvm-project
47 lines
1.7 KiB
LLVM
47 lines
1.7 KiB
LLVM
; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM
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; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM
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; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB
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define i32 @VarArg() nounwind {
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entry:
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%i = alloca i32, align 4
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%j = alloca i32, align 4
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%k = alloca i32, align 4
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%m = alloca i32, align 4
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%n = alloca i32, align 4
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%tmp = alloca i32, align 4
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%0 = load i32, i32* %i, align 4
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%1 = load i32, i32* %j, align 4
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%2 = load i32, i32* %k, align 4
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%3 = load i32, i32* %m, align 4
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%4 = load i32, i32* %n, align 4
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; ARM: VarArg
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; ARM: mov [[FP:r[0-9]+]], sp
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; ARM: sub sp, sp, #32
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; ARM: movw r0, #5
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; ARM: ldr r1, {{\[}}[[FP]], #-4]
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; ARM: ldr r2, {{\[}}[[FP]], #-8]
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; ARM: ldr r3, {{\[}}[[FP]], #-12]
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; ARM: ldr [[Ra:r[0-9]+]], [sp, #16]
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; ARM: ldr [[Rb:[lr]+[0-9]*]], [sp, #12]
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; ARM: str [[Ra]], [sp]
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; ARM: str [[Rb]], [sp, #4]
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; ARM: bl {{_?CallVariadic}}
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; THUMB: sub sp, #32
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; THUMB: movs r0, #5
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; THUMB: ldr r1, [sp, #28]
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; THUMB: ldr r2, [sp, #24]
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; THUMB: ldr r3, [sp, #20]
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; THUMB: ldr.w {{[a-z0-9]+}}, [sp, #16]
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; THUMB: ldr.w {{[a-z0-9]+}}, [sp, #12]
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; THUMB: str.w {{[a-z0-9]+}}, [sp]
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; THUMB: str.w {{[a-z0-9]+}}, [sp, #4]
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; THUMB: bl {{_?}}CallVariadic
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%call = call i32 (i32, ...) @CallVariadic(i32 5, i32 %0, i32 %1, i32 %2, i32 %3, i32 %4)
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store i32 %call, i32* %tmp, align 4
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%5 = load i32, i32* %tmp, align 4
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ret i32 %5
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}
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declare i32 @CallVariadic(i32, ...)
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