forked from OSchip/llvm-project
69 lines
2.0 KiB
LLVM
69 lines
2.0 KiB
LLVM
; RUN: llc < %s -enable-tail-merge | FileCheck %s
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; Check that calls to baz and quux are tail-merged.
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; PR1628
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; CHECK: bl _baz
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; CHECK-NOT: bl _baz
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; CHECK: bl _quux
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; CHECK-NOT: bl _quux
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; ModuleID = 'tail.c'
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target triple = "arm-apple-darwin8"
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define i32 @f(i32 %i, i32 %q) {
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entry:
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%i_addr = alloca i32 ; <i32*> [#uses=2]
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%q_addr = alloca i32 ; <i32*> [#uses=2]
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%retval = alloca i32, align 4 ; <i32*> [#uses=1]
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store i32 %i, i32* %i_addr
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store i32 %q, i32* %q_addr
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%tmp = load i32, i32* %i_addr ; <i32> [#uses=1]
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%tmp1 = icmp ne i32 %tmp, 0 ; <i1> [#uses=1]
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%tmp12 = zext i1 %tmp1 to i8 ; <i8> [#uses=1]
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%toBool = icmp ne i8 %tmp12, 0 ; <i1> [#uses=1]
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br i1 %toBool, label %cond_true, label %cond_false
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cond_true: ; preds = %entry
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%tmp3 = call i32 (...) @bar( ) ; <i32> [#uses=0]
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%tmp4 = call i32 (...) @baz( i32 5, i32 6 ) ; <i32> [#uses=0]
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br label %cond_next
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cond_false: ; preds = %entry
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%tmp5 = call i32 (...) @foo( ) ; <i32> [#uses=0]
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%tmp6 = call i32 (...) @baz( i32 5, i32 6 ) ; <i32> [#uses=0]
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br label %cond_next
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cond_next: ; preds = %cond_false, %cond_true
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%tmp7 = load i32, i32* %q_addr ; <i32> [#uses=1]
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%tmp8 = icmp ne i32 %tmp7, 0 ; <i1> [#uses=1]
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%tmp89 = zext i1 %tmp8 to i8 ; <i8> [#uses=1]
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%toBool10 = icmp ne i8 %tmp89, 0 ; <i1> [#uses=1]
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br i1 %toBool10, label %cond_true11, label %cond_false15
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cond_true11: ; preds = %cond_next
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%tmp13 = call i32 (...) @foo( ) ; <i32> [#uses=0]
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%tmp14 = call i32 (...) @quux( i32 3, i32 4 ) ; <i32> [#uses=0]
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br label %cond_next18
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cond_false15: ; preds = %cond_next
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%tmp16 = call i32 (...) @bar( ) ; <i32> [#uses=0]
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%tmp17 = call i32 (...) @quux( i32 3, i32 4 ) ; <i32> [#uses=0]
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br label %cond_next18
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cond_next18: ; preds = %cond_false15, %cond_true11
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%tmp19 = call i32 (...) @bar( ) ; <i32> [#uses=0]
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br label %return
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return: ; preds = %cond_next18
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%retval20 = load i32, i32* %retval ; <i32> [#uses=1]
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ret i32 %retval20
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}
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declare i32 @bar(...)
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declare i32 @baz(...)
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declare i32 @foo(...)
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declare i32 @quux(...)
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